公开(公告)号：US20140002194A1

公开(公告)日：2014-01-02

申请号：US13909819

申请日：2013-06-04

Applicant: Broadcom Corporation

Inventor： Klaas Bult ,  Rudy Van de Plassche ,  Pieter Vorenkamp ,  Arnoldus Venes

IPC: H03G3/30

CPC classification number: H03G3/30 ,  H03F1/34 ,  H03F3/195 ,  H03F3/24 ,  H03F3/45188 ,  H03F3/45192 ,  H03F2200/294 ,  H03F2200/331 ,  H03F2200/372 ,  H03F2200/513 ,  H03F2203/45644 ,  H03G1/0029 ,  H04B2001/0433

Abstract: An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.

Abstract translation: 综合通信系统。 包括具有设置在基板上的接收器的基板，用于将接收信号转换成IF信号。 耦合到VGA用于低电压应用并耦合到接收机处理IF信号。 VGA包括具有第一组差分晶体管组和第二组差分晶体管组的存储体对。 银行对并行交叉耦合，IF信号被施加到从用于在一定范围的输入电压上控制存储体对的跨导输出增益的控制信号去耦的存储体对。 数字IF解调器设置在衬底上并耦合到用于低电压应用的VGA，用于将IF信号转换成解调的基带信号。 并且发射机设置在与接收器协作操作的基板上以建立双向通信路径。