Method and System for Channel Estimation Processing for Interference Suppression
    1.
    发明申请
    Method and System for Channel Estimation Processing for Interference Suppression 有权
    干扰抑制信道估计处理方法和系统

    公开(公告)号:US20130094621A1

    公开(公告)日:2013-04-18

    申请号:US13693244

    申请日:2012-12-04

    CPC classification number: H04L27/00 H04B1/7107 H04B1/7115 H04L25/0204

    Abstract: Aspects of a method and system for channel estimation for interference suppression are provided. In this regard, one or more circuits and/or processors of a mobile communication device may generate and/or receive a first set of channel estimates and a second set of channel estimates. The one or more circuits and/or processors may modify the second set of channel estimates based on a comparison of a measure of correlation between the first set of channel estimates and the second set of channel estimates with a threshold. The first set of channel estimates and/or the modified second set of channel estimates may be utilized for cancelling interference in received signals. The first set of channel estimates may be associated with a first transmit antenna of a base transceiver station and the second set of channel estimates may be associated with a second transmit antenna of the base transceiver station.

    Abstract translation: 提供了用于干扰抑制的信道估计的方法和系统的方面。 在这点上,移动通信设备的一个或多个电路和/或处理器可以生成和/或接收第一组信道估计和第二组信道估计。 一个或多个电路和/或处理器可以基于第一组信道估计与具有阈值的第二组信道估计之间的相关度的比较来修改第二组信道估计。 可以利用第一组信道估计和/或修改的第二组信道估计来消除接收信号中的干扰。 第一组信道估计可以与基站收发台的第一发射天线相关联,并且第二组信道估计可以与基站的第二发射天线相关联。

    Method and System for Fast Cell Search Using PSYNC Process in a Multimode WCDMA Terminal
    2.
    发明申请
    Method and System for Fast Cell Search Using PSYNC Process in a Multimode WCDMA Terminal 有权
    在多模WCDMA终端中使用PSYNC进程的快速小区搜索的方法和系统

    公开(公告)号:US20140293806A1

    公开(公告)日:2014-10-02

    申请号:US14168683

    申请日:2014-01-30

    CPC classification number: H04W48/16 H04B7/2675 H04W48/18 H04W56/0035 H04W88/06

    Abstract: Certain aspects of a method and system for a fast cell search using a primary synchronization channel (PSYNC) process in a multimode wideband code division multiple access (WCDMA) terminal are provided. A WCDMA frequency search or a global system for mobile communications (GSM) frequency search is performed based on a current radio access technology (RAT), received signal strength indication (RSSI) scan measurements, and PSYNC detection operations. The RSSI scan measurements may be averaged by making multiple measurements during a measurement period. At least part of the PSYNC detection operations may be performed during a remaining portion of the measurement period. WCDMA carrier frequencies may be marked in accordance with the results of the PSYNC detection operations. For GSM, some of the frequencies may be removed from the search based on the PSYNC marking while the remaining search frequencies may be ranked based on results from the RSSI scan measurements.

    Abstract translation: 提供了在多模宽带码分多址(WCDMA)终端中使用主同步信道(PSYNC)进程的快速小区搜索的方法和系统的某些方面。 基于当前无线电接入技术(RAT),接收信号强度指示(RSSI)扫描测量和PSYNC检测操作来执行WCDMA频率搜索或全球移动通信(GSM)频率搜索系统。 可以通过在测量期间进行多次测量来对RSSI扫描测量进行平均。 至少部分PSYNC检测操作可以在测量周期的剩余部分期间执行。 可以根据PSYNC检测操作的结果标记WCDMA载波频率。 对于GSM,可以基于PSYNC标记从搜索中去除一些频率,而基于RSSI扫描测量的结果可以对剩余的搜索频率进行排名。

    Systems and Methods for Reducing Frequency Pulling in an Oscillator Circuit
    3.
    发明申请
    Systems and Methods for Reducing Frequency Pulling in an Oscillator Circuit 有权
    降低振荡电路中拉频的系统和方法

    公开(公告)号:US20130127555A1

    公开(公告)日:2013-05-23

    申请号:US13740939

    申请日:2013-01-14

    Abstract: Methods and systems are provided to calibrate an oscillator circuit to reduce frequency pulling as a result of a change in power to a portion of the oscillator circuit. In an embodiment, an oscillator is coupled to a clock buffer circuit and a tuning capacitor configured to tune a frequency of the oscillator to a baseline frequency required for cellular communications. A change in power to the clock buffer circuit initiates a change in an amount of capacitance seen by the oscillator, which negatively impacts the tuning of the oscillator. A register stores a frequency offset caused by the change in power, and the tuning capacitor is adjusted, using the frequency offset, in response to the change in power, such that the total amount of capacitance seen by the oscillator is not changed when the change in power occurs.

    Abstract translation: 提供了方法和系统来校准振荡器电路,以减少振荡器电路的一部分功率变化导致的频率拉动。 在一个实施例中,振荡器耦合到时钟缓冲器电路和调谐电容器,其被配置为将振荡器的频率调谐到蜂窝通信所需的基准频率。 时钟缓冲电路的功率变化启动振荡器看到的电容量的变化,这对振荡器的调谐产生负面影响。 寄存器存储由功率变化引起的频率偏移,并且使用频率偏移来调整调谐电容器以响应功率的变化,使得当变化时振荡器所看到的电容量总和没有改变 发生电力。

    METHOD AND SYSTEM FOR DIVERSITY PROCESSING UTILIZING A PROGRAMMABLE INTERFACE SUPPRESSION MODULE
    4.
    发明申请
    METHOD AND SYSTEM FOR DIVERSITY PROCESSING UTILIZING A PROGRAMMABLE INTERFACE SUPPRESSION MODULE 有权
    利用可编程接口抑制模块进行多元处理的方法与系统

    公开(公告)号:US20130322585A1

    公开(公告)日:2013-12-05

    申请号:US13965071

    申请日:2013-08-12

    Inventor: Mark HAHM Wei LUO

    CPC classification number: H04L1/0631 H04B1/7107

    Abstract: Aspects of a method and system for diversity processing utilizing a programmable interface suppression module may include one or more circuits that are operable to program an interference suppression module based on one or more interference cancellation parameters. A plurality of weighting factor values may be computed based on the one or more interference suppression parameters and a received plurality of multipath signals. A plurality of estimated signal may be generated based on the plurality of weighting factor values. A plurality of updated estimated signals may be generated based on the plurality of estimated signals. A plurality of interference suppressed signals may be generated based on the plurality of updated estimated signals.

    Abstract translation: 利用可编程接口抑制模块的用于分集处理的方法和系统的方面可以包括一个或多个可用于基于一个或多个干扰消除参数对干扰抑制模块进行编程的电路。 可以基于一个或多个干扰抑制参数和接收到的多个多径信号来计算多个加权因子值。 可以基于多个加权因子值来生成多个估计信号。 可以基于多个估计信号来生成多个更新的估计信号。 可以基于多个更新的估计信号来生成多个干扰抑制信号。

Patent Agency Ranking