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    Use of step and flash imprint lithography for direct imprinting of dielectric materials for dual damascene processing
    1.
    发明申请
    Use of step and flash imprint lithography for direct imprinting of dielectric materials for dual damascene processing 失效
    使用步进和闪光压印光刻技术直接刻印用于双镶嵌加工的介质材料

    公开(公告)号：US20060261518A1

    公开(公告)日：2006-11-23

    申请号：US11363071

    申请日：2006-02-27

    申请人： C. Willson ,  Frank Palmieri ,  Yukio Nishimura ,  Stephen Johnson ,  Michael Stewart

    发明人： C. Willson ,  Frank Palmieri ,  Yukio Nishimura ,  Stephen Johnson ,  Michael Stewart

    IPC分类号： B29C59/02 ,  B29C35/08 ,  B28B11/08

    CPC分类号： H01L21/76817 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  H01L21/76807 ,  H01L21/76828

    摘要： In some embodiments, the present invention is directed to methods that involve the combination of step-and-flash imprint lithography (SFIL) with a multi-tier template to simultaneously pattern multiple levels of, for example, an integrated circuit device. In such embodiments, the imprinted material generally does not serve or act as a simple etch mask or photoresist, but rather serves as the insulation between levels and lines, i.e., as a functional dielectric material. After imprinting and a multiple step curing process, the imprinted pattern is filled with metal, as in dual damascene processing. Typically, the two printed levels will comprise a “via level,” which is used to make electrical contact with the previously patterned under-level, and a “wiring level.” The present invention provides for the direct patterning of functional materials, which represents a significant departure from the traditional approach to microelectronics manufacturing.

    摘要翻译： 在一些实施例中，本发明涉及涉及步进和快速压印光刻（SFIL）与多层模板的组合以同时对例如集成电路器件的多个级别进行图案化的方法。 在这样的实施例中，压印材料通常不起到或用作简单的蚀刻掩模或光致抗蚀剂的作用，而是用作层和线之间的绝缘，即功能介电材料。 在印迹和多步固化过程之后，印刷图案充满金属，如在双镶嵌加工中。 通常，两个印刷电平将包括用于与先前图案化的欠电平进行电接触的“通孔电平”和“接线电平”。 本发明提供了功能材料的直接图案化，其代表了与传统的微电子制造方法的显着不同。

    Use of step and flash imprint lithography for direct imprinting of dielectric materials for dual damascene processing
    2.
    发明授权
    Use of step and flash imprint lithography for direct imprinting of dielectric materials for dual damascene processing 失效
    使用步进和闪光压印光刻技术直接刻印用于双镶嵌加工的介质材料

    公开(公告)号：US07691275B2

    公开(公告)日：2010-04-06

    申请号：US11363071

    申请日：2006-02-27

    申请人： C. Grant Willson ,  Frank Palmieri ,  Yukio Nishimura ,  Stephen C. Johnson ,  Michael D. Stewart

    发明人： C. Grant Willson ,  Frank Palmieri ,  Yukio Nishimura ,  Stephen C. Johnson ,  Michael D. Stewart

    IPC分类号： H01L21/302

    CPC分类号： H01L21/76817 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  H01L21/76807 ,  H01L21/76828

    摘要： In some embodiments, the present invention is directed to methods that involve the combination of step-and-flash imprint lithography (SFIL) with a multi-tier template to simultaneously pattern multiple levels of, for example, an integrated circuit device. In such embodiments, the imprinted material generally does not serve or act as a simple etch mask or photoresist, but rather serves as the insulation between levels and lines, i.e., as a functional dielectric material. After imprinting and a multiple step curing process, the imprinted pattern is filled with metal, as in dual damascene processing. Typically, the two printed levels will comprise a “via level,” which is used to make electrical contact with the previously patterned under-level, and a “wiring level.” The present invention provides for the direct patterning of functional materials, which represents a significant departure from the traditional approach to microelectronics manufacturing.

    摘要翻译： 在一些实施例中，本发明涉及涉及步进和快速压印光刻（SFIL）与多层模板的组合以同时对例如集成电路器件的多个级别进行图案化的方法。 在这样的实施例中，压印材料通常不起到或用作简单的蚀刻掩模或光致抗蚀剂的作用，而是用作层和线之间的绝缘，即功能介电材料。 在印迹和多步固化过程之后，印刷图案充满金属，如在双镶嵌加工中。 通常，两个印刷层将包括用于与先前图案化的底层电接触的“通孔层”和“布线层”。本发明提供了功能材料的直接图案化，其代表 显着地偏离了传统的微电子制造方法。