公开(公告)号：US20220208761A1

公开(公告)日：2022-06-30

申请号：US17609368

申请日：2020-05-07

申请人： CAMBRIDGE GAN DEVICES LIMITED

发明人： Florin Udrea ,  Loizos Efthymiou ,  Giorgia Longobardi ,  Martin Arnold

IPC分类号： H01L27/088 ,  H01L27/06 ,  H01L27/095 ,  H03K17/082

摘要： We disclose a Ill-nitride semiconductor based heterojunction power device, comprising: a first heterojunction transistor (19) formed on a substrate, the first heterojunction transistor comprising: a first Ill-nitride semiconductor region formed over the substrate, wherein the first Ill-nitride semiconductor region comprises a first heterojunction comprising at least one two dimensional carrier gas of second conductivity type; a first terminal (8) operatively connected to the first Ill-nitride semiconductor region; a second terminal (9) laterally spaced from the first terminal and operatively connected to the first Ill-nitride semiconductor region; a first gate terminal (10) formed over the first Ill-nitride semiconductor region between the first terminal and the second terminal. The device also includes a second heterojunction transistor (14) formed on a substrate, the second heterojunction transistor comprising: a second Ill-nitride semiconductor region formed over the substrate, wherein the second Ill-nitride semiconductor region comprises a second heterojunction comprising at least one two dimensional carrier gas of second conductivity type; a third terminal operatively connected to the second Ill-nitride semiconductor region; a fourth terminal laterally spaced from the third terminal in a first dimension and operatively connected to the second Ill-nitride semiconductor region, wherein the fourth terminal is operatively connected to the first gate terminal; and a second gate terminal formed over the second Ill-nitride semiconductor region between the third terminal and the fourth terminal and wherein the second heterojunction transistor is used in sensing and protection functions of the first power heterojunction transistor. The device also includes at least one monolithically integrated current sensing transistor (16) that has a substantially identical structure to the first heterojunction transistor, and
wherein the third transistor is scaled to a smaller area or a shorter gate width when compared to the first heterojunction transistor by a scale factor, X, where X is larger than 1. Other embodiments include both internal and external sensing, sensing loads and a feedback circuit to provide overcurrent, gate over-voltage or over-temperature protection.

公开(公告)号：US10818786B1

公开(公告)日：2020-10-27

申请号：US16405671

申请日：2019-05-07

申请人： Cambridge GaN Devices Limited

发明人： Florin Udrea ,  Loizos Efthymiou ,  Giorgia Longobardi ,  Martin Arnold

IPC分类号： H01L21/02 ,  H01L27/02 ,  H01L27/095 ,  H01L29/20 ,  H01L29/205 ,  H01L29/66 ,  H01L29/778

摘要： We disclose a III-nitride semiconductor based heterojunction power device, comprising: a first heterojunction transistor formed on a substrate, the first heterojunction transistor comprising: a first III-nitride semiconductor region formed over the substrate, wherein the first III-nitride semiconductor region comprises a first heterojunction comprising at least one two dimensional carrier gas of second conductivity type; a first terminal operatively connected to the first III-nitride semiconductor region; a second terminal laterally spaced from the first terminal and operatively connected to the first III-nitride semiconductor region; a first gate terminal formed over the first III-nitride semiconductor region between the first terminal and the second terminal. The device also includes a second heterojunction transistor formed on a substrate, the second heterojunction transistor comprising: a second III-nitride semiconductor region formed over the substrate, wherein the second III-nitride semiconductor region comprises a second heterojunction comprising at least one two dimensional carrier gas of second conductivity type; a third terminal operatively connected to the second III-nitride semiconductor region; a fourth terminal laterally spaced from the third terminal in a first dimension and operatively connected to the second III-nitride semiconductor region, wherein the fourth terminal is operatively connected to the first gate terminal; and a second gate terminal formed over the second III-nitride semiconductor region between the third terminal and the fourth terminal and wherein the second heterojunction transistor is used in sensing and protection functions of the first power heterojunction transistor.

公开(公告)号：US11081578B2

公开(公告)日：2021-08-03

申请号：US16405457

申请日：2019-05-07

申请人： Cambridge GaN Devices Limited

发明人： Florin Udrea ,  Loizos Efthymiou ,  Giorgia Longobardi ,  Martin Arnold

IPC分类号： H01L29/778 ,  H01L29/20 ,  H01L27/07 ,  H01L29/66 ,  H01L21/02 ,  H01L29/205

摘要： We disclose herein a depletion mode III-nitride semiconductor based heterojunction device, comprising: a substrate; a III-nitride semiconductor region formed over the substrate, wherein the III-nitride semiconductor region comprises a heterojunction comprising at least one two-dimensional carrier gas of second conductivity type; a first terminal operatively connected to the III-nitride semiconductor region; a second terminal laterally spaced from the first terminal in a first dimension and operatively connected to the III-nitride semiconductor region; at least two highly doped semiconductor regions of a first conductivity type formed over the III-nitride semiconductor region, the at least two highly doped semiconductor regions being formed between the first terminal and the second terminal; and a gate terminal formed over the at least two highly doped semiconductor regions; wherein the at least two highly doped semiconductor regions are spaced from each other in a second dimension.

公开(公告)号：US20220310832A1

公开(公告)日：2022-09-29

申请号：US17609366

申请日：2020-05-07

申请人： CAMBRIDGE GAN DEVICES LIMITED

发明人： Florin UDREA ,  Loizes Efthymiou ,  Giorgia Longobardi ,  Martin Arnold

IPC分类号： H01L29/778 ,  H01L29/20 ,  H01L27/088 ,  H01L27/02 ,  H01L27/06 ,  H01L27/07

摘要： We disclose a III-nitride semiconductor based heterojunction power device comprising: a first heterojunction transistor formed on a substrate (4) and a second heterojunction transistor formed on the substrate. The first heterojunction transistor comprises: first III-nitride semiconductor region formed over the substrate, wherein the first III-nitride semiconductor region comprises a first heterojunction comprising at least one two dimensional carrier gas; a first terminal (8) operatively connected to the first III-nitride semiconductor region; a second terminal (9) laterally spaced from the first terminal and operatively connected to the first III-nitride semiconductor region; and a first gate region (10) over the first III-nitride semiconductor region between the first and second terminals. The second heterojunction transistor comprises: a second III-nitride semiconductor region formed over the substrate, wherein the second III-nitride semiconductor region comprises a second heterojunction comprising at least one two dimensional carrier gas; a third terminal (19) operatively connected to the second III-nitride semiconductor region; a fourth terminal (16) laterally spaced from the third terminal in the first dimension and operatively connected to the second III-nitride semiconductor region; a first plurality of highly doped semiconductor regions (18) of a first conductivity type formed over the second III-nitride semiconductor region, the first plurality of highly doped semiconductor regions being formed between the third terminal and the fourth terminal; and a second gate region (17) operatively connected to the first plurality of highly doped semiconductor regions. One of the first and second heterojunction transistors is an enhancement mode field effect transistor and the other of the first and second heterojunction transistors is a depletion mode field effect transistor.