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公开(公告)号:US20210304713A1
公开(公告)日:2021-09-30
申请号:US17191286
申请日:2021-03-03
发明人: Masuo YOKOTA
摘要: An effect addition device includes at least one processor that executes a time domain convolution process of convolving a first time domain data part of impulse response of sound effects with a time domain data on an original sound, a frequency domain convolution process of convoluting a second time domain data part of the impulse response data with the time domain data on the original sound, a convolution extension process of extending a convolved state(s) of an output signal(s) resulting from the time domain convolution process and/or the frequency domain convolution process by arithmetic processing which corresponds to an all-pass filter and/or arithmetic processing which corresponds to a comb filter, and a synthesized sound effect addition process of adding a sound effect which is synthesized by execution of the time domain convolution process, the frequency domain convolution process and the convolution extension process to the original sound.
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公开(公告)号:US20220157284A1
公开(公告)日:2022-05-19
申请号:US17441269
申请日:2020-01-17
发明人: Masuo YOKOTA
IPC分类号: G10H1/12
摘要: A filter effect imparting device includes a characteristic-variable filter that has a variable filter characteristic corresponding to a coefficient group composed of a plurality of filter coefficients, and a control circuit that changes the coefficient group from a first coefficient group that is set as a start point to a second coefficient group that is set as an end point. The control circuit retains the coefficient group during the change and, in newly setting a third coefficient group as the end point, the control circuit sets the retained coefficient group as the start point.
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公开(公告)号:US20180268794A1
公开(公告)日:2018-09-20
申请号:US15876406
申请日:2018-01-22
发明人: Masuo YOKOTA
CPC分类号: G10H1/043 , G10H1/125 , G10H2210/281 , G10H2250/115 , G10H2250/145 , H03H17/0213 , H03H17/06
摘要: A signal processing apparatus has a first memory in which plural pieces of FIR coefficient data used for implementing an FIR filter algorithm are stored, a second memory which stores plural pieces of input data to be subjected to the FIR filter algorithm, and a processor implements the FIR filter algorithm using the plural pieces of FIR coefficient data stored in the first memory and the plural pieces of input data stored in the second memory as many times as the number corresponding to a designated filter order, in which filter algorithm each piece of coefficient data and each piece of input data are multiplied together and resultant products are summed up. The signal processing apparatus is provided, which can implement plural sorts of FIR filter algorithms of filter order which can be changed flexibly.
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公开(公告)号:US20180268793A1
公开(公告)日:2018-09-20
申请号:US15900095
申请日:2018-02-20
发明人: Hiroki SATO , Masuo YOKOTA
CPC分类号: G10H1/02 , G10H1/00 , G10H1/0008 , G10H1/0091 , G10H1/057 , G10H1/12 , G10H1/18 , G10H1/46 , G10H2210/265 , G10H2210/281 , G10H2210/315 , G10H2240/071 , G10H2250/025 , G10H2250/035 , G10H2250/041 , G10H2250/055 , G10H2250/115 , G10H2250/121 , G10H2250/541 , G10K15/08 , G10K15/12 , H03H17/0009 , H03H17/0264 , H03H17/0294 , H03H17/04 , H03H2017/0295 , H03H2017/0472 , H04R5/04 , H04S7/30
摘要: When an instruction is provided for changing a characteristic of a set filter which includes a plurality of partial filters and forms a specified characteristic by combining a plurality of partial filters, a processor performs, as crossfading processing for a first filter and a second filter among the plurality of partial filters, fade-out processing of gradually decreasing a degree of contribution of the first filter to the characteristic and fade-in processing of gradually increasing a degree of contribution of the second filter to the characteristic. As a result, unnaturalness occurring at the time of changing filter characteristics is solved.
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