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    INTEGRATED RING OSCILLATOR CLOCK GENERATOR
    1.
    发明申请
    INTEGRATED RING OSCILLATOR CLOCK GENERATOR 审中-公开

    公开(公告)号：US20180294801A1

    公开(公告)日：2018-10-11

    申请号：US15950762

    申请日：2018-04-11

    申请人： CHAOLOGIX, INC.

    发明人： Timothy Arthur BELL ,  Daniel F. YANNETTE

    IPC分类号： H03K3/03 ,  H03K3/011 ,  H03K3/86

    CPC分类号： H03K3/0315 ,  H03K3/011 ,  H03K3/86

    摘要： A clock generator includes a series of inverting stages; and at least one combinational logic stage. The series of inverting stages is tapped at two or more locations along the series of inverting stages to provide intermediary outputs. A combinational logic stage of the at least one combinational logic stage is coupled to receive two or more of the intermediary outputs and generate a clock signal. Multi-phase, multi-duty cycle, non-overlapping clock signals can be generated by the clock generator based on different combinations of intermediary outputs. The clock signals can be provided to a switching network.

    CONTINUOUSLY CHARGED ISOLATED SUPPLY NETWORK FOR SECURE LOGIC APPLICATIONS
    2.
    发明申请
    CONTINUOUSLY CHARGED ISOLATED SUPPLY NETWORK FOR SECURE LOGIC APPLICATIONS 有权
    用于安全逻辑应用的连续充电隔离电源网络

    公开(公告)号：US20170063376A1

    公开(公告)日：2017-03-02

    申请号：US14793258

    申请日：2015-07-07

    申请人： CHAOLOGIX, INC.

    发明人： Timothy Arthur BELL ,  Brent Arnold MYERS

    IPC分类号： H03K19/003 ,  G05F1/59 ,  H04L9/00 ,  H03K19/0948

    CPC分类号： H03K19/003 ,  G05F1/59 ,  G09C1/00 ,  H03K19/0948 ,  H04L9/003 ,  H04L9/004 ,  H04L9/005 ,  H04L2209/12

    摘要： A floating core network for secure isolation of a circuit from an external supply interface is described. Isolation of a core is accomplished through a dynamic current limiting network providing an isolated core voltage to the core; and an isolated supply for the corresponding core that is continuously recharged by the dynamic current limiting network. The dynamic current limiting network can include two control loops, one control loop providing a fixed gate voltage to a p-type transistor supplying current to the isolated supply and another control loop providing a fixed gate voltage to an n-type transistor sinking current from the isolated supply.

    摘要翻译： 描述了用于从外部电源接口安全地隔离电路的浮动核心网络。 核心的隔离通过动态限流网络来实现，该网络向核心提供隔离的核心电压; 以及由动态限流网络连续再充电的相应核心的隔离电源。 动态限流网络可以包括两个控制环路，一个控制环路向提供给隔离电源的电流的p型晶体管提供固定栅极电压，另一个控制环路为从n型晶体管提供固定栅极电压 隔离供应。