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公开(公告)号：US20240333268A1
公开(公告)日：2024-10-03
申请号：US18739876
申请日：2024-06-11
发明人： Huaixin XIAN , Longbiao LEI , Senpei GOA , Zhang-Ying YAN , Qingchao MENG , Jerry Chang Jui KAO
CPC分类号： H03K3/86 , H03K3/0375 , H03K3/356113
摘要： A method of forming a semiconductor device includes forming a first row of transistors extending in a first direction and including dummy transistors and active transistors. The first row includes, in a sequence from a first end to a second end, at least a first dummy group, a first delay cell, a second delay cell, and a second dummy group. The first dummy group is formed of one or more dummy transistors. The second dummy group is formed of one or more dummy transistors. The first delay cell is formed of active transistors configured as a basic inverter and a float-resistant inverter. The second delay cell is formed of active transistors configured as at least one inverter. The first row is free of dummy transistors between the first delay cell and the second delay cell.
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公开(公告)号：US20240056062A1
公开(公告)日：2024-02-15
申请号：US17822559
申请日：2022-08-26
发明人： Huaixin XIAN , Longbiao LEI , Sinpei GOA , Zhang-Ying YAN , Qingchao MENG , Jerry Chang Jui KAO
CPC分类号： H03K3/86 , H03K3/0375 , H03K3/356113
摘要： A semiconductor device includes a first dummy group having a first set of dummy transistors; a first delay cell having a first set of active transistors; a second delay cell having a second set of active transistors; a second dummy group having a second set of dummy transistors; and relative to a first direction the first and second dummy groups and the first and second delay cells being arranged in a first sequence arranged as the first dummy group, the first delay cell, the second delay cell, and the second dummy group; and the first and second delay cells being free from having another dummy group therebetween.
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公开(公告)号：US09484918B1
公开(公告)日：2016-11-01
申请号：US14834837
申请日：2015-08-25
发明人： Yen-Cheng Kuan , Ining Ku , Zhiwei A. Xu , Susan L. Morton , Donald A. Hitko , Peter Petre , Jose Cruz-Albrecht , Alan E. Reamon
IPC分类号： H03K19/003 , H03K19/00
CPC分类号： H03K19/00369 , H01Q3/26 , H01Q3/2682 , H03K3/86 , H03K19/0016 , H04B7/0617 , H04B7/0671
摘要： A pulse domain 1 to 2N demultiplexer has a (i) pair of N stage counters each of which is responsive to an incoming pulse train in the pulse domain, one of the counters being responsive to leading edges of the pulses in the incoming pulse train and the other one of the counters being responsive to trailing edges of the pulses in the incoming pulse train and (ii) a control logic responsive to the states through which the pair of counters count, the control logic including 2N gate arrangements, each of the 2N gate arrangements generating a output signal of the pulse domain 1 to 2N demultiplexer.
摘要翻译： 脉冲域1至2N解复用器具有（i）一对N级计数器，每个N级计数器响应于脉冲域中的输入脉冲序列，其中一个计数器响应于输入脉冲串中的脉冲的前沿， 另一个计数器响应输入脉冲串中的脉冲的后沿，以及（ii）响应于该对计数器计数的状态的控制逻辑，包括2N个门装置的控制逻辑，2N个 门结构产生脉冲域1至2N解复用器的输出信号。
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公开(公告)号：US08963603B2
公开(公告)日：2015-02-24
申请号：US14245515
申请日：2014-04-04
发明人： Shih-Hsiun Huang , Shian-Ru Lin
CPC分类号： H03K3/86 , H03K5/15013
摘要： A clock generation device includes a first delay unit, a frequency divider, an angle delay unit and a first calculating unit. The first delay unit receives an input clock and delays the input clock by a first preset period to generate an input delay clock. The frequency divider divides a frequency of the delay clock to generate a first frequency-divided clock and a second frequency-divided clock. A frequency of each of the first frequency-divided clock and the second frequency-divided clock is a preset multiple of the input delay clock. The angle delay unit delays the first frequency-divided clock by a second preset period to generate a first delay clock. The first calculating unit determines a trigger time of a first edge of a first output clock with reference to voltage levels of the first frequency-divided clock and the first delay clock and determines a falling time of a second edge of the first output clock with reference to voltage levels of the input clock and the first delay clock.
摘要翻译： 时钟发生装置包括第一延迟单元，分频器，角度延迟单元和第一计算单元。 第一延迟单元接收输入时钟并将输入时钟延迟第一预设周期以产生输入延迟时钟。 分频器分频延迟时钟的频率以产生第一分频时钟和第二分频时钟。 第一分频时钟和第二分频时钟中的每一个的频率是输入延迟时钟的预设倍数。 角度延迟单元将第一分频时钟延迟第二预设周期以产生第一延迟时钟。 第一计算单元参考第一分频时钟和第一延迟时钟的电压电平来确定第一输出时钟的第一边沿的触发时间，并且以参考的方式确定第一输出时钟的第二边缘的下降时间 到输入时钟和第一延迟时钟的电压电平。
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公开(公告)号：US08933742B2
公开(公告)日：2015-01-13
申请号：US13890649
申请日：2013-05-09
CPC分类号： H03K3/86 , H03K5/13 , H03K2005/00032 , H03K2005/00052
摘要： Time-Mode Signal Processing (TMSP) offers a means for offsetting some of the challenges for analog circuit designs when exploiting CMOS circuit processes designed for digital applications. It would therefore be beneficial to provide a digital method for the storage, addition and subtraction of Time-Mode variables as these offer significant benefit to providing TMSP techniques and expanding their exploitation within devices, systems, and applications. While driven by CMOS process challenges the TM circuits outlined may exploit essentially any digital circuit technology since they are based upon delay. The inventors present an approach to TM variables wherein a switched delay unit is exploited and adopted such that the instantaneous phase difference between two rising signal edges can be latched and used to perform various arithmetic operations. Beneficially, the technique allows analog sampled-data signal processing to be implemented within digital circuitry.
摘要翻译： 时间模式信号处理（TMSP）提供了一种在利用为数字应用设计的CMOS电路工艺时，抵消模拟电路设计中的一些挑战的手段。 因此，提供用于存储，加减时间模式变量的数字方法将是有益的，因为它们提供了提供TMSP技术并扩展其在设备，系统和应用中的利用的显着优点。 在CMOS工艺挑战的驱动下，TM电路基本上可以利用任何数字电路技术，因为它们基于延迟。 本发明人提出了一种TM变量的方法，其中开关和采用开关延迟单元，使得两个上升信号边沿之间的瞬时相位差可被锁存并用于执行各种算术运算。 有利的是，该技术允许在数字电路内实现模拟采样数据信号处理。
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公开(公告)号：US08410859B2
公开(公告)日：2013-04-02
申请号：US12902203
申请日：2010-10-12
申请人： Oved S.F. Zucker
发明人： Oved S.F. Zucker
IPC分类号： H03K3/42
CPC分类号： H03K3/86 , Y10T29/49002
摘要： A microwave generator and/or methods thereof. A microwave generator may include a plurality of connected sequential sections in cascade. A microwave generator may include a first section and an output section. Each section may include an intermediate conductor, an upper conductor and a lower conductor. A first isolating material having a first thickness may be connected between an intermediate conductor and an upper conductor. A second isolating material having a second thickness may be connected between an intermediate conductor and a lower conductor. A switch may be connected between an intermediate conductor and an upper conductor and/or a lower conductor, forming a switched thickness and an unswitched thickness. The unswitched thickness of an output section is larger than the unswitched thickness of the first section and the increase in unswitched thickness from the first section to the output section includes a monotonic increase.
摘要翻译： 微波发生器和/或其方法。 微波发生器可以包括级联的多个连接的连续部分。 微波发生器可以包括第一部分和输出部分。 每个部分可以包括中间导体，上导体和下导体。 具有第一厚度的第一隔离材料可以连接在中间导体和上导体之间。 具有第二厚度的第二隔离材料可以连接在中间导体和下导体之间。 开关可以连接在中间导体和上导体和/或下导体之间，形成开关厚度和非开关厚度。 输出部分的未切换厚度大于第一部分的未切换厚度，并且从第一部分到输出部分的未切换厚度的增加包括单调增加。
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公开(公告)号：US08232682B2
公开(公告)日：2012-07-31
申请号：US13185966
申请日：2011-07-19
申请人： Simon London
发明人： Simon London
IPC分类号： H03K3/00
摘要： A bipolar pulse generator is implemented in a simple structure while providing a high efficiency design having a relatively low total size, while still allowing access by fibers used to control a photoconductive switch that activates the generator. The bipolar pulse generator includes a stacked Blumlein generator structure with an additional transmission line connected to a load at its near end and short-circuited at its distal end. An extra transmission line is positioned between the Blumlein generator's structure and the load provides specified limited gap between positive and negative sub-pulses. The bipolar pulse generator further includes a bended Blumlein generator structure, in which an existing intrinsic “stray” transmission line is used to provide the bipolar pulse. Still further, bipolar pulse generator includes stepped transmission lines, with additional switches positioned between steps, which are charged by different voltages.
摘要翻译： 双极脉冲发生器以简单的结构实现，同时提供具有相对低的总体尺寸的高效率设计，同时仍然允许通过用于控制激活发生器的光电导开关的光纤访问。 双极脉冲发生器包括一个堆叠的Blumlein发生器结构，其附加的传输线在其近端连接到负载并在其远端短路。 一个额外的传输线位于Blumlein发生器的结构之间，负载提供正和负子脉冲之间规定的有限间隙。 双极脉冲发生器还包括弯曲的Blumlein发生器结构，其中使用现有的本征“杂散”传输线来提供双极性脉冲。 此外，双极脉冲发生器包括阶梯式传输线，其中附加的开关位于阶梯之间，由不同的电压充电。
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公开(公告)号：US08004120B2
公开(公告)日：2011-08-23
申请号：US12404061
申请日：2009-03-13
申请人： Simon London
发明人： Simon London
IPC分类号： H03K3/00
摘要： A bipolar pulse generator is implemented in a simple structure while providing a high efficiency design having a relatively low total size, while still allowing access by fibers used to control a photoconductive switch that activates the generator. The bipolar pulse generator includes a stacked Blumlein generator structure with an additional transmission line connected to a load at its near end and short-circuited at its distal end. An extra transmission line is positioned between the Blumlein generator's structure and the load provides specified limited gap between positive and negative sub-pulses. The bipolar pulse generator further includes a bended Blumlein generator structure, in which an existing intrinsic “stray” transmission line is used to provide the bipolar pulse. Still further, bipolar pulse generator includes stepped transmission lines, with additional switches positioned between steps, which are charged by different voltages.
摘要翻译： 双极脉冲发生器以简单的结构实现，同时提供具有相对低的总体尺寸的高效率设计，同时仍然允许通过用于控制激活发生器的光电导开关的光纤访问。 双极脉冲发生器包括一个堆叠的Blumlein发生器结构，其附加的传输线在其近端连接到负载并在其远端短路。 一个额外的传输线位于Blumlein发生器的结构之间，负载提供正和负子脉冲之间规定的有限间隙。 双极脉冲发生器还包括弯曲的Blumlein发生器结构，其中使用现有的本征“杂散”传输线来提供双极性脉冲。 此外，双极脉冲发生器包括阶梯式传输线，其中附加的开关位于阶梯之间，由不同的电压充电。
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公开(公告)号：US20070103213A1
公开(公告)日：2007-05-10
申请号：US11560825
申请日：2006-11-16
申请人： John Wood
发明人： John Wood
IPC分类号： H03L7/06
CPC分类号： H03B5/1852 , G06F1/10 , H03K3/03 , H03K3/86 , H03L7/00
摘要： Timing signal generation and distribution are combined in operation of a signal path exhibiting endless electromagnetic continuity affording signal phase inversion and having associated regenerative active means. Two- or more-phases of substantially square-wave bipolar signals arise directly in traveling wave transmission-line embodiments compatible with semiconductor fabrication including CMOS. Coordination by attainable frequency synchronism with phase coherence for several such oscillating signal paths has intra-IC inter-IC and printed circuit board impact.
摘要翻译： 定时信号产生和分配被组合在具有提供信号相位反转的无止境电磁连续性并且具有相关联的再生有源装置的信号路径的操作中。 基本方波双极性信号的两相或更多相直接出现在与包括CMOS的半导体制造兼容的行波传输线实施例中。 通过实现具有相位相干性的几个这样的振荡信号路径的可实现的频率同步的协调具有IC内IC和印刷电路板的影响。
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公开(公告)号：US20050101265A1
公开(公告)日：2005-05-12
申请号：US10702036
申请日：2003-11-06
申请人： Mladen Kekez , Daniel Kekez
发明人： Mladen Kekez , Daniel Kekez
CPC分类号： H03K3/86
摘要： A device for generating and radiating radio frequencies. The device includes a transmission line, a source, and a means for applying a voltage impulse to the transmission line from a low impedance source. A quarter-wave trap is added between the source and the transmission line to suppress the onset of a parasitic radiating mode. The quarter-wave trap also acts as an antenna to transmit the energy to the surrounding environment from the transmission line, which is behaving as an oscillatory circuit. The low impedance source is an electrically driven impulse generator. As a further modification, a second antenna can be attached to the free end of the transmission line to enable lower frequencies to be transmitted.
摘要翻译： 用于产生和辐射射频的装置。 该装置包括传输线，源极和用于从低阻抗源向传输线施加电压脉冲的装置。 在源极和传输线之间增加一个四分之一波形阱，以抑制寄生辐射模式的开始。 四分之一波形陷波器还用作将天线从传输线传输到周围环境的天线，传输线作为振荡电路。 低阻抗源是电驱动脉冲发生器。 作为进一步的修改，第二天线可以附接到传输线的自由端，以便能够传输更低的频率。
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