TEST DISPLAY PANEL, DRIVING METHOD THEREOF AND FORMING METHOD THEREOF

    公开(公告)号:US20190088179A1

    公开(公告)日:2019-03-21

    申请号:US16056476

    申请日:2018-08-06

    IPC分类号: G09G3/00 G09G3/3258 G09G3/20

    摘要: A test display panel is configured for application to a lighting test, and includes a plurality of reference voltage input terminals and a plurality of sub-pixels. The reference voltage input terminals are in a one-to-one correspondence to the sub-pixels. The display panel further includes a reference voltage supply circuit and a plurality of reference voltage lines. The sub-pixels include a plurality of first sub-pixels, second sub-pixels, and third sub-pixels having different colors. The reference voltage lines include a first reference voltage line, a second reference voltage line, and a third reference voltage line, each corresponding to respective sub-pixels. The reference voltage supply circuit is configured to provide reference voltages to the plurality of reference voltage lines in a time division manner. The reference voltage lines are electrically coupled to respective reference voltage input terminals of the sub-pixels.

    Test display panel, driving method thereof and forming method thereof

    公开(公告)号:US10984692B2

    公开(公告)日:2021-04-20

    申请号:US16056476

    申请日:2018-08-06

    IPC分类号: G09G3/00 G09G3/3258 G09G3/20

    摘要: A test display panel is configured for application to a lighting test, and includes a plurality of reference voltage input terminals and a plurality of sub-pixels. The reference voltage input terminals are in a one-to-one correspondence to the sub-pixels. The display panel further includes a reference voltage supply circuit and a plurality of reference voltage lines. The sub-pixels include a plurality of first sub-pixels, second sub-pixels, and third sub-pixels having different colors. The reference voltage lines include a first reference voltage line, a second reference voltage line, and a third reference voltage line, each corresponding to respective sub-pixels. The reference voltage supply circuit is configured to provide reference voltages to the plurality of reference voltage lines in a time division manner. The reference voltage lines are electrically coupled to respective reference voltage input terminals of the sub-pixels.