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公开(公告)号：US11862676B2
公开(公告)日：2024-01-02
申请号：US17925806
申请日：2020-12-28
发明人： Dong Fang , Kui Xiao , Zheng Bian , Jinjie Hu
IPC分类号： H01L29/06 , H01L29/10 , H01L29/40 , H01L29/66 , H01L29/78 , H01L29/739 , H01L21/8234
CPC分类号： H01L29/063 , H01L21/823487 , H01L29/1095 , H01L29/401 , H01L29/407 , H01L29/66333 , H01L29/66348 , H01L29/7397 , H01L29/7813 , H01L29/7827
摘要： A semiconductor device comprises a drift region (100), a body region (110), a first doped region (111) and a second doped region (112)); a first trench penetrates the first doped region (111), the body region (110) extends into the drift region (100); an extension region (150) having an opposite conductivity type to the drift region (100) and surrounding the bottom wall of the first trench; where the first trench is filled with a first conductive structure (141) and a second conductive structure (142); a dielectric layer (130) formed between the second conductive structure (142) and the inner wall of the first trench, as well as between the first conductive structure (141) and the inner wall of the first trench; a second trench penetrating the first doped region (111) and the body region (110), and a dielectric layer (130) located between the third conductive structure (143) and the second trench (122).
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公开(公告)号：US11799024B2
公开(公告)日：2023-10-24
申请号：US17926357
申请日：2020-12-28
发明人： Dong Fang , Kui Xiao , Zheng Bian , Jinjie Hu
IPC分类号： H01L29/739 , H01L29/06 , H01L29/10 , H01L29/40 , H01L29/417 , H01L29/66
CPC分类号： H01L29/7397 , H01L29/063 , H01L29/1095 , H01L29/407 , H01L29/41708 , H01L29/66348
摘要： A preparation method for semiconductor device, comprising: forming a body region (110) in the drift region (100), forming a first doped region (111) and a second doped region (112) in the body region (110); forming a first trench (171) penetrating the first doped region (111) and the body region (110) and extending to the drift region (100); forming an extension region (150) with a conductivity type opposite to that of the drift region (100) and surrounding the bottom wall of the first trench (171); filling the first trench (171) with a dielectric layer (130) formed on the sidewall of the trench, a first conductive structure (141) located at the bottom of the trench and a second conductive structure (142) located at the top of the trench; forming a second trench (172) penetrating the body region (110) and extending into the drift region (100); filling the second trench (172) with a third conductive structure (143) and a dielectric layer (130) formed on the inner wall of the trench. The second conductive structure (142) is electrically connected with the gate, and the first doped region (111), the second doped region (112), and the third conductive structure (143) are electrically connected with the first electrode (130).
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