公开(公告)号：US20180358390A1

公开(公告)日：2018-12-13

申请号：US15766428

申请日：2016-08-24

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Xinxin LIU ,  Xiaodong HE

IPC: H01L27/13 ,  H01L23/64 ,  H01L49/02 ,  H01L27/12

CPC classification number: H01L27/13 ,  H01L23/64 ,  H01L23/642 ,  H01L27/12 ,  H01L27/1203 ,  H01L28/40

Abstract: A dielectric capacitor includes: a bottom silicon layer (102); a buried oxide layer (104) formed on a surface of the bottom silicon layer (102); a top silicon layer (106) formed on a surface of the buried oxide layer (104); an interlayer dielectric layer (108) formed on a surface of the top silicon layer (106); a lower plate (110), an insulation layer (112), and an upper plate (114) sequentially formed on the interlayer dielectric layer (108) and forming the main portion of the dielectric capacitor; a shallow trench isolation structure (116) formed on the top silicon layer (106) and configured to isolate an active region; and a deep trench isolation structure (118) formed below the lower plate (110) and passing through the top silicon layer (106) to be connected to the buried oxide layer (104).