Patent search ap:("Cadence Design Systems Page Inc.") AND inv:"Anil Kumar Ankam"

1.

发明授权
Systems and methods for correcting for pre-cursor and post-cursor intersymbol interference in a data signal 有权

公开(公告)号：US10171270B1

公开(公告)日：2019-01-01

申请号：US15849288

申请日：2017-12-20

Applicant: Cadence Design Systems, Inc.

Inventor： Satish Anand Verkila , Vineeth Anavangot , Anil Kumar Ankam

IPC: H04L25/03 , H04L1/00

Abstract: Various embodiments provide for correcting pre-cursor intersymbol interference (ISI) and post-cursor ISI in a data signal received over a channel. More particularly, some embodiments correct pre-cursor ISI and post-cursor ISI using decision feedback equalization (DFE).

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