System and method for error checking and correction with metadata storage in a memory controller

    公开(公告)号:US11928027B1

    公开(公告)日:2024-03-12

    申请号:US17952453

    申请日:2022-09-26

    IPC分类号: G06F11/10

    CPC分类号: G06F11/108 G06F11/1092

    摘要: Embodiments include receiving fixed size error checking and correction data blocks and metadata at a memory controller. Embodiments may include performing data to symbol mapping based upon the fixed size data blocks and providing an output of the data to symbol mapping to a first encoder without metadata configured for full detection correction of single device error and to a second encoder with metadata configured for partial detection correction of single device error. Embodiments may include receiving data at a memory based upon an output from the first encoder and the second encoder and receiving data from the memory at a first decoder without metadata configured for full detection correction of single device error and at a second decoder with metadata configured for partial detection correction. Embodiments may include re-mapping symbol data from the first decoder and the second decoder to actual data and generating output data blocks and metadata.