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公开(公告)号：US11831153B1
公开(公告)日：2023-11-28
申请号：US16940679
申请日：2020-07-28
CPC分类号： H02H9/046 , H01L25/18 , H03H7/0115 , H03H2210/026
摘要： A tuned single-coil inductor is implemented between a signal driver output and external contact of an ESD-protected integrated circuit (IC) die and more specifically between the parasitic capacitances of the signal driver and the contact-coupled ESD (electrostatic discharge) element to form a Pi (π) filter that enhances signaling bandwidth at the target signaling rate of the IC die. The signal driver may be implemented with output-stage data serialization circuitry disposed in series between source terminals of a thick-oxide drive transistor and a power rail to avoid explicit level-shifting circuitry between the relatively low core voltage domain and relatively high I/O voltage domain.
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公开(公告)号：US11810633B2
公开(公告)日：2023-11-07
申请号：US17460701
申请日：2021-08-30
发明人： Ashwin S. M. , Anirudha Shelke , Navin Kumar Mishra , Phalguni Bala , Younus Syed , Kiran Baby , Sudhir Kumar Katla Shetty
CPC分类号： G11C29/36 , G11C7/22 , G11C29/50004 , G11C2207/2254
摘要： In a receiver having at least a first equalizer and a sampler, a calibration module jointly calibrates a reference voltage and one or more equalizer coefficients. For each of a set of test reference voltages, an equalizer coefficient for the first equalizer may be learned that maximizes a right eye boundary of an eye diagram of a sampler input signal to a sampler of the receiver following the equalization stage. Then, from the possible pairs of reference voltages and corresponding optimal equalizer coefficients, a pair is identified that maximizes an eye width of the eye diagram. After setting the reference voltage, the first equalizer coefficient may then be adjusted together with learning a second equalizer coefficient for the second equalizer using a similar technique.
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