Multiplexer flop
    1.
    发明授权
    Multiplexer flop 有权
    多路复用器翻牌

    公开(公告)号:US09130549B2

    公开(公告)日:2015-09-08

    申请号:US14217935

    申请日:2014-03-18

    申请人: Cavium, Inc.

    IPC分类号: H03K3/03 H03K3/037

    CPC分类号: H03K3/0372

    摘要: In an embodiment, a flip flop circuit includes a master latch and a slave latch. The master latch comprises a storage element, a first data leg, and a second data leg. The first and second data legs may be coupled to the storage element. Clock selection logic may be coupled to the first and second data legs. The clock selection logic may have a select input for selecting between the first and second data legs. The slave latch may be coupled to the master latch.

    摘要翻译: 在一个实施例中,触发器电路包括主锁存器和从锁存器。 主锁存器包括存储元件,第一数据支脚和第二数据支线。 第一和第二数据支脚可以耦合到存储元件。 时钟选择逻辑可以耦合到第一和第二数据支路。 时钟选择逻辑可以具有用于在第一和第二数据支路之间进行选择的选择输入。 从锁存器可以耦合到主锁存器。

    Dynamically adjusting supply voltage based on monitored chip temperature
    2.
    发明授权
    Dynamically adjusting supply voltage based on monitored chip temperature 有权
    根据监测的芯片温度动态调整电源电压

    公开(公告)号:US09507369B2

    公开(公告)日:2016-11-29

    申请号:US14040431

    申请日:2013-09-27

    申请人: Cavium, Inc.

    IPC分类号: G05F5/00 G05F1/46

    CPC分类号: G05F5/00 G05F1/463

    摘要: In an embodiment, a method includes monitoring a temperature of a semiconductor chip and adjusting a supply voltage to the semiconductor chip based on the monitored temperature. The temperature may be monitored by a temperature sensor located on-chip or off-chip. Adjusting the supply voltage includes increasing the supply voltage as a function of the monitored temperature decreasing. The increase to the supply voltage occurs only if the monitored temperature is below a threshold temperature. The supply voltage adjustment is determined by a linear relationship having a negative slope with temperature.

    摘要翻译: 在一个实施例中,一种方法包括监视半导体芯片的温度并基于所监视的温度调整对半导体芯片的电源电压。 温度可以由位于片上或芯片外的温度传感器监测。 调整电源电压包括随着监测温度的降低而增加电源电压。 只有当监测到的温度低于阈值温度时,电源电压的增加才会发生。 电源电压调整由具有负斜率与温度的线性关系确定。

    IMPLEMENTING 128-BIT SIMD OPERATIONS ON A 64-BIT DATAPATH
    3.
    发明申请
    IMPLEMENTING 128-BIT SIMD OPERATIONS ON A 64-BIT DATAPATH 审中-公开
    在64位DATAPATH上实现128位SIMD操作

    公开(公告)号:US20160140079A1

    公开(公告)日:2016-05-19

    申请号:US14940585

    申请日:2015-11-13

    申请人: Cavium, Inc.

    IPC分类号: G06F15/80 G06F9/30

    摘要: A method of implementing a processor architecture and corresponding system includes operands of a first size and a datapath of a second size. The second size is different from the first size. Given a first array of registers and a second array of registers, each register of the first and second arrays being of the second size, selecting a first register and corresponding second register from the first array and the second array, respectively, to perform operations of the first size. This allows a user, who is interfacing with the hardware processor through software, to provide data of the datapath bit-width instead of the register bit-width. Advantageously, the user is agnostic to the size of the registers.

    摘要翻译: 实现处理器体系结构和对应系统的方法包括具有第二大小的第一大小和数据路径的操作数。 第二大小与第一大小不同。 给定第一阵列寄存器和第二寄存器阵列,第一和第二阵列的每个寄存器分别为第二大小,从第一阵列和第二阵列分别选择第一寄存器和对应的第二寄存器,以执行 第一大小。 这允许通过软件与硬件处理器连接的用户提供数据路径位宽而不是寄存器位宽的数据。 有利地,用户对寄存器的大小是不可知的。

    MULTIPLEXER FLOP
    4.
    发明申请
    MULTIPLEXER FLOP 有权
    多层飞机

    公开(公告)号:US20150061741A1

    公开(公告)日:2015-03-05

    申请号:US14217935

    申请日:2014-03-18

    申请人: CAVIUM, INC.

    IPC分类号: H03K3/037

    CPC分类号: H03K3/0372

    摘要: In an embodiment, a flip flop circuit includes a master latch and a slave latch. The master latch comprises a storage element, a first data leg, and a second data leg. The first and second data legs may be coupled to the storage element. Clock selection logic may be coupled to the first and second data legs. The clock selection logic may have a select input for selecting between the first and second data legs. The slave latch may be coupled to the master latch.

    摘要翻译: 在一个实施例中,触发器电路包括主锁存器和从锁存器。 主锁存器包括存储元件,第一数据支脚和第二数据支线。 第一和第二数据支脚可以耦合到存储元件。 时钟选择逻辑可以耦合到第一和第二数据支路。 时钟选择逻辑可以具有用于在第一和第二数据支路之间进行选择的选择输入。 从锁存器可以耦合到主锁存器。

    Dynamically Adjusting Supply Voltage Based On Monitored Chip Temperature
    5.
    发明申请
    Dynamically Adjusting Supply Voltage Based On Monitored Chip Temperature 有权
    基于监测芯片温度动态调整电源电压

    公开(公告)号:US20150091638A1

    公开(公告)日:2015-04-02

    申请号:US14040431

    申请日:2013-09-27

    申请人: Cavium, Inc.

    IPC分类号: G05F5/00

    CPC分类号: G05F5/00 G05F1/463

    摘要: In an embodiment, a method includes monitoring a temperature of a semiconductor chip and adjusting a supply voltage to the semiconductor chip based on the monitored temperature. The temperature may be monitored by a temperature sensor located on-chip or off-chip. Adjusting the supply voltage includes increasing the supply voltage as a function of the monitored temperature decreasing. The increase to the supply voltage occurs only if the monitored temperature is below a threshold temperature. The supply voltage adjustment is determined by a linear relationship having a negative slope with temperature.

    摘要翻译: 在一个实施例中,一种方法包括监视半导体芯片的温度并基于所监视的温度调节对半导体芯片的电源电压。 温度可以由位于片上或芯片外的温度传感器监测。 调整电源电压包括随着监测温度的降低而增加电源电压。 只有当监测到的温度低于阈值温度时,电源电压的增加才会发生。 电源电压调整由具有负斜率与温度的线性关系确定。