公开(公告)号：US20110193170A1

公开(公告)日：2011-08-11

申请号：US12704065

申请日：2010-02-11

申请人： Chang-Tzu WANG ,  Tien-Hao TANG

发明人： Chang-Tzu WANG ,  Tien-Hao TANG

IPC分类号： H01L23/60

CPC分类号： H01L27/0274 ,  H01L27/0277

摘要： An ESD clamping device comprises a plurality of fingers each comprising a source region of first conductivity type formed in a substrate of second conductivity type, a drain region of said first conductivity type formed in the substrate, and a gate formed over the substrate and between the source and drain regions. At least one of the fingers each has an ESD implantation region formed in the substrate and partially underlying the drain region of the finger, the ESD implantation region being a heavily doped region of said second conductivity type. Furthermore, at least one of the fingers has a gate extension portion projecting from the gate and demarcating an additional region in at least the drain region of the finger, the additional region of said second conductivity type being electrically connected to at least one of the gate and the substrate of each of the fingers.

摘要翻译： ESD钳位装置包括多个指状物，每个指状物包括形成在第二导电类型的衬底中的第一导电类型的源极区域，形成在衬底中的所述第一导电类型的漏极区域，以及形成在衬底上方之间的栅极 源极和漏极区域。 每个手指中的至少一个具有形成在衬底中并部分地位于手指的漏极区域的ESD注入区域，ESD注入区域是所述第二导电类型的重掺杂区域。 此外，指状物中的至少一个具有从栅极突出并且限定手指的至少漏极区域中的附加区域的栅极延伸部分，所述第二导电类型的附加区域电连接到栅极的至少一个 和每个手指的基板。

公开(公告)号：US20130208379A1

公开(公告)日：2013-08-15

申请号：US13369455

申请日：2012-02-09

申请人： Chang-Tzu WANG ,  Tien-Hao TANG ,  Kuan-Cheng SU

发明人： Chang-Tzu WANG ,  Tien-Hao TANG ,  Kuan-Cheng SU

IPC分类号： H02H9/04

CPC分类号： H01L27/0262 ,  H01L29/7436 ,  H01L29/87

摘要： A semiconductor ESD protection apparatus comprises a substrate; a first doped well disposed in the substrate and having a first conductivity; a first doped area having the first conductivity disposed in the first doped well; a second doped area having a second conductivity disposed in the first doped well; and an epitaxial layer disposed in the substrate, wherein the epitaxial layer has a third doped area with the first conductivity and a fourth doped area with the second conductivity separated from each other. Whereby a first bipolar junction transistor (BJT) equivalent circuit is formed between the first doped area, the first doped well and the third doped area; a second BJT equivalent circuit is formed between the second doped area, the first doped well and the fourth doped area; and the first BJT equivalent circuit and the second BJT equivalent circuit have different majority carriers.

摘要翻译： 半导体ESD保护装置包括基板; 第一掺杂阱，其设置在所述衬底中并且具有第一导电性; 具有第一导电性的第一掺杂区域设置在第一掺杂阱中; 第二掺杂区域，具有设置在第一掺杂阱中的第二导电体; 以及设置在所述衬底中的外延层，其中所述外延层具有具有第一导电性的第三掺杂区域和具有第二导电性的第四掺杂区域彼此分离。 由此在第一掺杂区，第一掺杂阱和第三掺杂区之间形成第一双极结型晶体管（BJT）等效电路; 在第二掺杂区，第一掺杂阱和第四掺杂区之间形成第二BJT等效电路; 并且第一BJT等效电路和第二BJT等效电路具有不同的多数载波。

公开(公告)号：US20130207184A1

公开(公告)日：2013-08-15

申请号：US13369423

申请日：2012-02-09

申请人： Lu-An CHEN ,  Tai-Hsiang LAI ,  Tien-Hao TANG

发明人： Lu-An CHEN ,  Tai-Hsiang LAI ,  Tien-Hao TANG

IPC分类号： H01L29/78

CPC分类号： H01L29/7835 ,  H01L27/0251

摘要： A semiconductor device includes a substrate, a gate structure, a source structure and a drain structure. The substrate includes a deep well region, and the gate structure is disposed on the deep well region. The source structure is formed within the deep well and located at a first side of the gate structure. The drain structure is formed within the deep well region and located at a second side of the gate structure. The drain structure includes a first doped region of a first conductivity type, a first electrode and a second doped region of a second conductivity type. The first doped region is located in the deep well region; the first electrode is electrically connected to the first doped region. The second doped region is disposed within the first doped region and between the first electrode and the gate structure.

摘要翻译： 半导体器件包括衬底，栅极结构，源极结构和漏极结构。 衬底包括深阱区，并且栅极结构设置在深阱区上。 源结构形成在深阱内并且位于栅极结构的第一侧。 漏极结构形成在深阱区域内并且位于栅极结构的第二侧。 漏极结构包括第一导电类型的第一掺杂区域，第二导电类型的第一电极和第二掺杂区域。 第一掺杂区位于深井区; 第一电极电连接到第一掺杂区域。 第二掺杂区域设置在第一掺杂区域内并且位于第一电极和栅极结构之间。

公开(公告)号：US20130027821A1

公开(公告)日：2013-01-31

申请号：US13190578

申请日：2011-07-26

申请人： Lu-An CHEN ,  Tai-Hsiang LAI ,  Tien-Hao TANG

发明人： Lu-An CHEN ,  Tai-Hsiang LAI ,  Tien-Hao TANG

IPC分类号： H02H9/04

CPC分类号： H02H9/046

摘要： An electrostatic discharge protection circuit is located between a first voltage terminal and a second voltage terminal. The electrostatic discharge protection circuit includes a first semiconductor switch and a second semiconductor switch. The first semiconductor switch is electrically connected to the first voltage terminal. If a voltage at the first voltage terminal complies with a starting condition, the first semiconductor switch is turned on, so that an electrostatic discharge current flows through the first voltage terminal and the first semiconductor switch. The second semiconductor switch is electrically connected between the first semiconductor switch and the second voltage terminal, wherein the electrostatic discharge current from the first semiconductor switch passes to the second voltage terminal through the second semiconductor switch.

摘要翻译： 静电放电保护电路位于第一电压端子和第二电压端子之间。 静电放电保护电路包括第一半导体开关和第二半导体开关。 第一半导体开关电连接到第一电压端子。 如果第一电压端子处的电压符合启动条件，则第一半导体开关导通，使得静电放电电流流过第一电压端子和第一半导体开关。 第二半导体开关电连接在第一半导体开关和第二电压端子之间，其中来自第一半导体开关的静电放电电流通过第二半导体开关传递到第二电压端子。