Endpoint-based parallel data processing with non-blocking collective instructions in a parallel active messaging interface of a parallel computer
    1.
    发明授权
    Endpoint-based parallel data processing with non-blocking collective instructions in a parallel active messaging interface of a parallel computer 有权
    基于端点的并行数据处理与并行计算机的并行活动消息接口中的非阻塞集体指令

    公开(公告)号:US08892850B2

    公开(公告)日:2014-11-18

    申请号:US13007848

    申请日:2011-01-17

    IPC分类号: G06F9/46 G06F9/54

    CPC分类号: G06F9/54

    摘要: Methods, apparatuses, and computer program products for endpoint-based parallel data processing with non-blocking collective instructions in a parallel active messaging interface (‘PAMI’) of a parallel computer are provided. Embodiments include establishing by a parallel application a data communications geometry, the geometry specifying a set of endpoints that are used in collective operations of the PAMI, including associating with the geometry a list of collective algorithms valid for use with the endpoints of the geometry. Embodiments also include registering in each endpoint in the geometry a dispatch callback function for a collective operation and executing without blocking, through a single one of the endpoints in the geometry, an instruction for the collective operation.

    摘要翻译: 提供了一种用于并行计算机的并行主动消息传递接口(“PAMI”)中基于端点的并行数据处理与非阻塞集体指令的方法,设备和计算机程序产品。 实施例包括通过并行应用建立数据通信几何形状,指定在PAMI的集合操作中使用的一组端点的几何形状,包括与几何形状相关联的集合算法列表,该集合算法的列表可与几何的端点一起使用。 实施例还包括在几何中的每个端点中注册用于集体操作的分派回调函数,并且通过几何中的单个端点执行不阻塞用于集合操作的指令。

    Endpoint-Based Parallel Data Processing With Non-Blocking Collective Instructions In A Parallel Active Messaging Interface Of A Parallel Computer
    2.
    发明申请
    Endpoint-Based Parallel Data Processing With Non-Blocking Collective Instructions In A Parallel Active Messaging Interface Of A Parallel Computer 有权
    基于端点的并行数据处理与并行计算机的并行主动消息接口中的非阻塞集体指令

    公开(公告)号:US20120185679A1

    公开(公告)日:2012-07-19

    申请号:US13007848

    申请日:2011-01-17

    IPC分类号: G06F9/30

    CPC分类号: G06F9/54

    摘要: Endpoint-based parallel data processing with non-blocking collective instructions in a parallel active messaging interface (‘PAMI’) of a parallel computer, the PAMI composed of data communications endpoints, each endpoint including a specification of data communications parameters for a thread of execution on a compute node, including specifications of a client, a context, and a task, the compute nodes coupled for data communications through the PAMI, including establishing by the parallel application a data communications geometry, the geometry specifying a set of endpoints that are used in collective operations of the PAMI, including associating with the geometry a list of collective algorithms valid for use with the endpoints of the geometry; registering in each endpoint in the geometry a dispatch callback function for a collective operation; and executing without blocking, through a single one of the endpoints in the geometry, an instruction for the collective operation.

    摘要翻译: 基于端点的并行数据处理与并行计算机的并行主动消息传递接口(“PAMI”)中的非阻塞集合指令,由数据通信端点组成的PAMI,每个端点包括用于执行线程的数据通信参数的规范 在计算节点上,包括客户端,上下文和任务的规范,耦合用于通过PAMI进行数据通信的计算节点,包括由并行应用程序建立数据通信几何,指定使用的一组端点的几何 在PAMI的集体操作中,包括与几何相关联的集合算法列表,其有效地用于几何的端点; 在几何中的每个端点注册用于集合操作的分派回调函数; 并且通过几何中的单个端点执行而不阻塞用于集合操作的指令。

    Pipelining protocols in misaligned buffer cases
    3.
    发明授权
    Pipelining protocols in misaligned buffer cases 有权
    不对齐缓冲区案例中的流水线协议

    公开(公告)号:US08572276B2

    公开(公告)日:2013-10-29

    申请号:US12769972

    申请日:2010-04-29

    IPC分类号: G06F15/16

    CPC分类号: G06F15/17318

    摘要: Systems, methods and articles of manufacture are disclosed for effecting a desired collective operation on a parallel computing system that includes multiple compute nodes. The compute nodes may pipeline multiple collective operations to effect the desired collective operation. To select protocols suitable for the multiple collective operations, the compute nodes may also perform additional collective operations. The compute nodes may pipeline the multiple collective operations and/or the additional collective operations to effect the desired collective operation more efficiently.

    摘要翻译: 公开了系统,方法和制品,用于在包括多个计算节点的并行计算系统上实现期望的集体操作。 计算节点可以管理多个集合操作来实现所需的集体操作。 为了选择适合于多个集合操作的协议,计算节点还可以执行附加的集合操作。 计算节点可以管理多个集合操作和/或附加集合操作以更有效地实现期望的集体操作。

    PIPELINING PROTOCOLS IN MISALIGNED BUFFER CASES
    4.
    发明申请
    PIPELINING PROTOCOLS IN MISALIGNED BUFFER CASES 有权
    管道缓冲器案例中的管道协议

    公开(公告)号:US20110271006A1

    公开(公告)日:2011-11-03

    申请号:US12769972

    申请日:2010-04-29

    IPC分类号: G06F15/16

    CPC分类号: G06F15/17318

    摘要: Systems, methods and articles of manufacture are disclosed for effecting a desired collective operation on a parallel computing system that includes multiple compute nodes. The compute nodes may pipeline multiple collective operations to effect the desired collective operation. To select protocols suitable for the multiple collective operations, the compute nodes may also perform additional collective operations. The compute nodes may pipeline the multiple collective operations and/or the additional collective operations to effect the desired collective operation more efficiently.

    摘要翻译: 公开了系统,方法和制品,用于在包括多个计算节点的并行计算系统上实现期望的集体操作。 计算节点可以管理多个集合操作来实现所需的集体操作。 为了选择适合于多个集合操作的协议,计算节点还可以执行附加的集合操作。 计算节点可以管理多个集合操作和/或附加集合操作以更有效地实现期望的集体操作。

    Replenishing data descriptors in a DMA injection FIFO buffer
    5.
    发明授权
    Replenishing data descriptors in a DMA injection FIFO buffer 失效
    在DMA注入FIFO缓冲区中补充数据描述符

    公开(公告)号:US08037213B2

    公开(公告)日:2011-10-11

    申请号:US11755501

    申请日:2007-05-30

    IPC分类号: G06F3/00 H04L12/28

    CPC分类号: G06F13/28

    摘要: Methods, apparatus, and products are disclosed for replenishing data descriptors in a Direct Memory Access (‘DMA’) injection first-in-first-out (‘FIFO’) buffer that include: determining, by a messaging module on an origin compute node, whether a number of data descriptors in a DMA injection FIFO buffer exceeds a predetermined threshold, each data descriptor specifying an application message for transmission to a target compute node; queuing, by the messaging module, a plurality of new data descriptors in a pending descriptor queue if the number of the data descriptors in the DMA injection FIFO buffer exceeds the predetermined threshold; establishing, by the messaging module, interrupt criteria that specify when to replenish the injection FIFO buffer with the plurality of new data descriptors in the pending descriptor queue; and injecting, by the messaging module, the plurality of new data descriptors into the injection FIFO buffer in dependence upon the interrupt criteria.

    摘要翻译: 公开了用于在直接存储器访问(“DMA”)注入先进先出('FIFO')缓冲器中补充数据描述符的方法,装置和产品,其包括:由原始计算节点 无论DMA注入FIFO缓冲器中的多个数据描述符是否超过预定阈值,每个数据描述符指定用于传输到目标计算节点的应用消息; 如果DMA注入FIFO缓冲器中的数据描述符的数量超过预定阈值,则由消息接发模块排队等待描述符队列中的多个新数据描述符; 由所述消息传递模块建立中断标准,所述中断标准指定何时用所述待处理描述符队列中的所述多个新数据描述符补充所述注入FIFO缓冲器; 以及根据所述中断标准,由所述消息收发模块将所述多个新数据描述符注入到所述注入FIFO缓冲器中。

    Replenishing Data Descriptors in a DMA Injection FIFO Buffer
    6.
    发明申请
    Replenishing Data Descriptors in a DMA Injection FIFO Buffer 失效
    在DMA注入FIFO缓冲区中补充数据描述符

    公开(公告)号:US20100268852A1

    公开(公告)日:2010-10-21

    申请号:US11755501

    申请日:2007-05-30

    IPC分类号: G06F13/28

    CPC分类号: G06F13/28

    摘要: Methods, apparatus, and products are disclosed for replenishing data descriptors in a Direct Memory Access (‘DMA’) injection first-in-first-out (‘FIFO’) buffer that include: determining, by a messaging module on an origin compute node, whether a number of data descriptors in a DMA injection FIFO buffer exceeds a predetermined threshold, each data descriptor specifying an application message for transmission to a target compute node; queuing, by the messaging module, a plurality of new data descriptors in a pending descriptor queue if the number of the data descriptors in the DMA injection FIFO buffer exceeds the predetermined threshold; establishing, by the messaging module, interrupt criteria that specify when to replenish the injection FIFO buffer with the plurality of new data descriptors in the pending descriptor queue; and injecting, by the messaging module, the plurality of new data descriptors into the injection FIFO buffer in dependence upon the interrupt criteria.

    摘要翻译: 公开了用于在直接存储器访问(“DMA”)注入先进先出('FIFO')缓冲器中补充数据描述符的方法,装置和产品,其包括:由原始计算节点 无论DMA注入FIFO缓冲器中的多个数据描述符是否超过预定阈值,每个数据描述符指定用于传输到目标计算节点的应用消息; 如果DMA注入FIFO缓冲器中的数据描述符的数量超过预定阈值,则由消息接发模块排队等待描述符队列中的多个新数据描述符; 由所述消息传递模块建立中断标准,所述中断标准指定何时用所述待处理描述符队列中的所述多个新数据描述符补充所述注入FIFO缓冲器; 以及根据所述中断标准,由所述消息收发模块将所述多个新数据描述符注入到所述注入FIFO缓冲器中。