High speed signal generator
    1.
    发明授权
    High speed signal generator 有权
    高速信号发生器

    公开(公告)号:US09130678B2

    公开(公告)日:2015-09-08

    申请号:US14102856

    申请日:2013-12-11

    CPC classification number: H04B10/516 H04B10/5055 H04L27/2627

    Abstract: A high-speed signal generator. A digital signal processing (DSP) block generates a set of N (where N is an integer and N≧2) parallel digital sub-band signals, each digital sub-band signal having frequency components within a spectral range between 0 Hz and ±Fs/2, where Fs is a sample rate of the digital sub-band signals. A respective Digital-to-Analog Converter (DAC) processes each digital sub-band signal to generate a corresponding analog sub-band signal, each DAC having a sample rate of Fs/2. A combiner combines the analog sub-band signals to generate an output analog signal having frequency components within a spectral range between 0 Hz and ±NFs/2.

    Abstract translation: 高速信号发生器。 数字信号处理(DSP)块产生一组N(其中N是整数且N≥2)并行数字子带信号,每个数字子带信号具有在0Hz和±Fs之间的频谱范围内的频率分量 / 2,其中Fs是数字子带信号的采样率。 相应的数模转换器(DAC)处理每个数字子带信号以产生对应的模拟子带信号,每个DAC具有采样率Fs / 2。 组合器组合模拟子带信号以产生具有在0Hz和±NFs / 2之间的频谱范围内的频率分量的输出模拟信号。

    High speed signal generator
    2.
    发明授权
    High speed signal generator 有权
    高速信号发生器

    公开(公告)号:US08693876B2

    公开(公告)日:2014-04-08

    申请号:US12692065

    申请日:2010-01-22

    CPC classification number: H04B10/516 H04B10/5055 H04L27/2627

    Abstract: A high-speed signal generator. A digital signal processing (DSP) block generates a set of N (where N is an integer and N≧2) parallel digital sub-band signals, each digital sub-band signal having frequency components within a spectral range between 0 Hz and ±Fs/2, where Fs is a sample rate of the digital sub-band signals. A respective Digital-to-Analog Converter (DAC) processes each digital sub-band signal to generate a corresponding analog sub-band signal, each DAC having a sample rate of Fs/2. A combiner combines the analog sub-band signals to generate an output analog signal having frequency components within a spectral range between 0 Hz and ±NFs/2.

    Abstract translation: 高速信号发生器。 数字信号处理(DSP)块产生一组N(其中N是整数且N≥2)并行数字子带信号,每个数字子带信号具有在0Hz和±Fs之间的频谱范围内的频率分量 / 2,其中Fs是数字子带信号的采样率。 相应的数模转换器(DAC)处理每个数字子带信号以产生对应的模拟子带信号,每个DAC具有采样率Fs / 2。 组合器组合模拟子带信号以产生具有在0Hz和±NFs / 2之间的频谱范围内的频率分量的输出模拟信号。

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