-
1.发明授权Method and apparatus for stacking electrical components using via to provide interconnection 有权使用通孔堆叠电气部件以提供互连的方法和装置公开(公告)号：US07892888B2
公开(公告)日：2011-02-22
申请号：US11805000
申请日：2007-05-21
申请人： Chen Jung Tsai , Chih Wen Lin
发明人： Chen Jung Tsai , Chih Wen Lin
IPC分类号： H01L21/00
CPC分类号： H01L23/49575 , H01L23/481 , H01L2224/16 , H01L2924/01057
摘要： An efficient chip stacking structure is described that includes a leadframe having two surfaces to each of which can be attached stacks of chips. A chip stack can be formed by placing a chip active surface on a back surface of another chip. Electrical connections between chips and leads on the leadframe are facilitated by bonding pads on chip active surfaces and by via that extend from the bonding pads through the chips to the back surfaces.
摘要翻译： 描述了一种有效的芯片堆叠结构，其包括具有两个表面的引线框架，其中每一个可以附接芯片堆叠。 可以通过将芯片有源表面放置在另一芯片的背表面上来形成芯片堆叠。 引线框架上的芯片和引线之间的电连接通过将芯片上的有效表面上的焊盘和通过芯片延伸到后表面的通孔来实现。
-
2.发明授权Method and apparatus for stacking electrical components using via to provide interconnection 有权使用通孔堆叠电气部件以提供互连的方法和装置公开(公告)号：US07462925B2
公开(公告)日：2008-12-09
申请号：US10987468
申请日：2004-11-12
申请人： Chen Jung Tsai , Chih Wen Lin
发明人： Chen Jung Tsai , Chih Wen Lin
IPC分类号： H01L23/495 , H01L23/02
CPC分类号： H01L23/49575 , H01L23/481 , H01L2224/16 , H01L2924/01057
摘要： An efficient chip stacking structure is described that includes a leadframe having two surfaces to each of which can be attached stacks of chips. A chip stack can be formed by placing a chip active surface on a back surface of another chip. Electrical connections between chips and leads on the leadframe are facilitated by bonding pads on chip active surfaces and by via that extend from the bonding pads through the chips to the back surfaces.
摘要翻译： 描述了一种有效的芯片堆叠结构，其包括具有两个表面的引线框架，其中每一个可以附接芯片堆叠。 可以通过将芯片有源表面放置在另一芯片的背表面上来形成芯片堆叠。 引线框架上的芯片和引线之间的电连接通过将芯片上的有效表面上的焊盘和通过芯片延伸到后表面的通孔来实现。
-
公开(公告)号：US07495327B2
公开(公告)日：2009-02-24
申请号：US11606661
申请日：2006-11-29
申请人： Chen Jung Tsai , Chih Wen Lin
发明人： Chen Jung Tsai , Chih Wen Lin
IPC分类号： H01L23/495 , H01L23/02
CPC分类号： H01L23/49575 , H01L2224/13025 , H01L2224/16 , H01L2924/00014 , H01L2224/05599
摘要： An efficient chip stacking structure is described that includes a leadframe having two surfaces to each of which can be attached stacks of chips. A chip stack can be formed by placing a chip active surface on a back surface of another chip. Electrical connections between chips and leads on the leadframe are facilitated by bonding pads on chip active surfaces and by via that extend from the bonding pads through the chips to the back surfaces.
摘要翻译： 描述了一种有效的芯片堆叠结构，其包括具有两个表面的引线框架，其中每一个可以附接芯片堆叠。 可以通过将芯片有源表面放置在另一芯片的背表面上来形成芯片堆叠。 引线框架上的芯片和引线之间的电连接通过将芯片上的有效表面上的焊盘和通过芯片延伸到后表面的通孔来实现。
-
4.发明授权Apparatus for stacking electrical components using insulated and interconnecting via 有权用于使用绝缘和互连通孔堆叠电气元件的装置公开(公告)号：US07217995B2
公开(公告)日：2007-05-15
申请号：US11030484
申请日：2005-01-05
申请人： Chen Jung Tsai , Chih Wen Lin
发明人： Chen Jung Tsai , Chih Wen Lin
CPC分类号： H01L23/49575 , H01L2224/13025 , H01L2224/16 , H01L2924/00014 , H01L2224/05599
摘要： An efficient chip stacking structure is described that includes a leadframe having two surfaces to each of which can be attached stacks of chips. A chip stack can be formed by placing a chip active surface on a back surface of another chip. Electrical connections between chips and leads on the leadframe are facilitated by bonding pads on chip active surfaces and by via that extend from the bonding pads through the chips to the back surfaces.
摘要翻译： 描述了一种有效的芯片堆叠结构，其包括具有两个表面的引线框架，其中每一个可以附接芯片堆叠。 可以通过将芯片有源表面放置在另一芯片的背表面上来形成芯片堆叠。 引线框架上的芯片和引线之间的电连接通过将芯片上的有效表面上的焊盘和通过芯片延伸到后表面的通孔来实现。
-
-
-
搜索结果
4 条记录 (耗时 0.021 秒)
