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公开(公告)号：US20240053844A1
公开(公告)日：2024-02-15
申请号：US17764549
申请日：2021-05-11
发明人： Peng XU , Wenhui GAO
IPC分类号： G06F3/041
CPC分类号： G06F3/0412 , G06F2203/04103 , G09G3/3233
摘要： Disclosed are a touch panel, a preparation method therefor, and a display apparatus. The touch panel includes a touch region and a bonding region on a side of the touch region in a first direction. The bonding region includes: a chip region including a first edge, a second edge, a third edge, and a fourth edge, the first and second edges extend along a second direction, and the first direction intersects the second direction; multiple pins in the chip region and including multiple display pins and multiple touch pins, the multiple display pins are arranged along the first and second edges, the multiple touch pins are arranged along the third and fourth edges, and the multiple display pins are configured to be connected with display signal lines; multiple touch electrodes in the touch region; and multiple touch signal lines in the touch region and the bonding region.
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公开(公告)号：US20220114969A1
公开(公告)日：2022-04-14
申请号：US17280160
申请日：2020-05-13
发明人： Lingran WANG , Jun YAN , Wenhui GAO
IPC分类号： G09G3/3266
摘要： The present disclosure provides a display substrate, a manufacturing method and a display device. The display substrate includes a scan driving circuit, at least one shift register unit includes an output circuit, a first energy storage circuit, and a first leakage prevention circuit; the scan driving circuit also includes a first voltage signal line and a second voltage signal line; a first voltage signal line is located on a side of the second voltage signal line away from the display area; the output circuit is respectively coupled to the first voltage signal line and the second voltage signal line, the first energy storage circuit is respectively coupled to the output circuit and the second voltage signal line, the first leakage prevention circuit is coupled to the output circuit; the output circuit is arranged between the first voltage signal line and the second voltage signal line.
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公开(公告)号：US20240111376A1
公开(公告)日：2024-04-04
申请号：US17762093
申请日：2021-05-11
发明人： Wenhui GAO , Peng XU , Shun ZHANG , Tiaomei ZHANG , Kai ZHANG , Zhiliang JIANG , Lingran WANG
CPC分类号： G06F3/0412 , G06F3/04164 , G06F3/0444 , G06F2203/04103 , G06F2203/04107
摘要： Disclosed is a display panel including a base substrate. The base substrate includes a display region, a wiring lead-out region and a signal access region that are located on a side of the display region. The wiring lead-out region is located between the display region and the signal access region. The wiring lead-out region includes: at least one first power supply line, at least one first touch signal line, and at least one first display signal line that are disposed on the base substrate. The first touch signal line is located on a side of the first power supply line away from the base substrate, and the first display signal line is located on a side of the first power supply line close to the base substrate.
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公开(公告)号：US20230132617A1
公开(公告)日：2023-05-04
申请号：US17781403
申请日：2021-07-26
发明人： Tong NIU , Peng XU , Wenhui GAO , Siyu WANG , Fengli JI
摘要： A display substrate and a display apparatus are provided. The display substrate includes a base substrate, a crack detection line and an electrostatic discharge element electrically connected to the crack detection line. The base substrate includes a main body area, an auxiliary area, and a necked-down area connecting the main body area and the auxiliary area, and a display area of the display substrate is in the main body area. The crack detection line surrounds, at least in part, the display area and extends through the necked-down area to the auxiliary area. A length direction of the necked-down area is parallel to a first direction; the main body area, the necked-down area and the auxiliary area are connected in a second direction intersecting the first direction; and the electrostatic discharge element is located in the auxiliary area.
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公开(公告)号：US20240237449A1
公开(公告)日：2024-07-11
申请号：US17780033
申请日：2021-06-04
发明人： Wenhui GAO , Peng XU , Siyu WANG , Lingran WANG , Caifeng ZHANG , Kai ZHANG , Shilong WANG , Tiaomei ZHANG , Zhiliang JIANG
IPC分类号： H10K59/131
CPC分类号： H10K59/1315
摘要： Disclosed are a display substrate, a preparation method thereof, and a display apparatus. The display substrate includes a display region and a non-display region surrounding the display region, wherein the non-display region includes a first border region at least partially surrounding the display region, a second border region and a lead convergence region located on a side of the display region, the lead convergence region is located between the first border region and the second border region, and the lead convergence region includes two corner regions and an intermediate convergence region located between the two corner regions; a plurality of data line leads, at least located in the first border region and the lead convergence region, and electrically connected with a plurality of data lines in the display region.
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公开(公告)号：US20240074256A1
公开(公告)日：2024-02-29
申请号：US17764616
申请日：2021-04-08
发明人： Wenhui GAO , Kai ZHANG , Erlong SONG , Jianjie LIU , Caifeng ZHANG , Xuejiao YANG
IPC分类号： H10K59/131 , H10K59/123 , H10K59/80
CPC分类号： H10K59/131 , H10K59/123 , H10K59/873
摘要： A display panel and a display device; the display panel includes a plurality of bonding pins. At least one bonding pin includes a first bonding electrode disposed on a side of an insulating layer group away from a base substrate, the insulating layer group having a first concave portion, the first bonding electrode having a second concave portion, an orthographic projection of the second concave portion on the base substrate being located within an orthographic projection of the first concave portion on the base substrate. The first bonding electrode includes at least a first conductor layer and a second conductor layer, and the at least one bonding pin further includes a filling portion disposed on a side of the second concave portion away from the base substrate, which is at least partially within the second concave portion.
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公开(公告)号：US20220131077A1
公开(公告)日：2022-04-28
申请号：US17406712
申请日：2021-08-19
发明人： Wenhui GAO , Kai ZHANG , Erlong SONG , Lingran WANG , Jianjie LIU
摘要： The present disclosure provides a mask plate, a display panel and a display device. The mask plate comprises: a transparent substrate; an opaque film layer, the opaque film layer being disposed on the transparent substrate. The opaque film layer includes a plurality of first regions and a plurality of second regions, a first sub-region in the first region and the second region are transmissive, and the remaining portion in the first region is semi-transmissive. The mask plate is used to form via holes in the planarization layer of the display panel by exposure, so that the angles between the metal electrode layers disposed in the via holes and the source/drain layers of the display panel are small and diversified, decreasing the visibility of the metal electrode layers.
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公开(公告)号：US20240365587A1
公开(公告)日：2024-10-31
申请号：US18291922
申请日：2023-04-24
发明人： Dan CAO , Xiaoqing SHU , Wenhui GAO , Yonglin GUO , Yunsheng XIAO
IPC分类号： H10K59/121 , G09G3/3233 , H10K59/131
CPC分类号： H10K59/1213 , G09G3/3233 , H10K59/131 , G09G2300/0842 , G09G2320/0233
摘要： A display substrate includes pixel circuits and light-emitting devices. The pixel circuits include first pixel circuits and second pixel circuits. The light-emitting devices include first light-emitting devices and second light-emitting devices. A first pixel circuit is coupled to a first light-emitting device, and the first pixel circuit is at least partially opposite to the first light-emitting device. A second pixel circuit is coupled to a second light-emitting device, and an orthographic projection of the second pixel circuit and an orthographic projection of the second light-emitting device have no overlap. A width-to-length ratio of a channel of a driving transistor in the first pixel circuit is greater than a width-to-length ratio of a channel of a driving transistor in the second pixel circuit; and/or a channel capacitance of a compensation transistor in the first pixel circuit is larger than a channel capacitance of a compensation transistor in the second pixel circuit.
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公开(公告)号：US20240274085A1
公开(公告)日：2024-08-15
申请号：US18023384
申请日：2022-06-30
发明人： Yonglin GUO , Yunsheng XIAO , Wenhui GAO
IPC分类号： G09G3/3266 , G09G3/32
CPC分类号： G09G3/3266 , G09G3/32 , G09G2310/0267 , G09G2310/0286 , G09G2320/0233
摘要： A display panel and a display apparatus are disclosed. The display panel includes: a display region, including M first display regions sequentially disposed along a first direction, and a non-display region, including M first GOA circuits and M clock signal line groups; a first display region includes multiple first signal lines sequentially disposed along the first direction and extending along a second direction intersecting with the first direction, a clock signal line group includes multiple clock signal lines, signals of at least two clock signal lines respectively in at least two clock signal line groups are same; a first GOA circuit includes multiple first GOA units, multiple first GOA units in an m-th first GOA circuit are connected with at least one clock signal line in an m-th clock signal line group, and are connected with multiple first signal lines in an m-th first display region in one-to-one correspondence.
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公开(公告)号：US20240164173A1
公开(公告)日：2024-05-16
申请号：US17777054
申请日：2021-06-02
发明人： Peng XU , Wenhui GAO , Tiaomei ZHANG , Shilong WANG
IPC分类号： H10K59/40 , H10K59/12 , H10K59/131 , H10K71/70
CPC分类号： H10K59/40 , H10K59/1201 , H10K59/131 , H10K71/70
摘要： A display panel, a manufacturing method thereof, and a display device are provided. The display panel comprises a base substrate, an effective region provided on the base substrate and a bonding region located on one side of the effective region; the bonding region comprises a bonding pin region including a bonding pin, a virtual pin and test signal lines; an orthographic projection of at least one of the test signal lines on the base substrate is within a range of an orthographic projection of the virtual pin on the base substrate, and the orthographic projection of the virtual pin on the base substrate does not overlap with an orthographic projection of the bonding pin on the base substrate.
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