Advisory System for Verifying Sensitive Circuits in Chip-Design
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    发明申请
    Advisory System for Verifying Sensitive Circuits in Chip-Design 有权
    芯片设计中验证敏感电路的咨询系统

    公开(公告)号:US20090172617A1

    公开(公告)日:2009-07-02

    申请号:US12054195

    申请日:2008-03-24

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5036 G06F17/5009

    摘要: A verification system for verifying an integrated circuit design is provided. The verification system includes a functional block finding module configured to identify potential sensitive circuits in the integrated circuit design; and a search module. The search module is configured to find sensitive circuits from the potential sensitive circuits; and verify the sensitive circuits.

    摘要翻译: 提供了用于验证集成电路设计的验证系统。 验证系统包括:功能块查找模块,被配置为识别集成电路设计中的潜在敏感电路; 和搜索模块。 搜索模块被配置为从潜在敏感电路中找到敏感电路; 并验证敏感电路。