公开(公告)号：US20120299530A1

公开(公告)日：2012-11-29

申请号：US13477067

申请日：2012-05-22

申请人： Chih-Wan Hsu ,  Nung-Te Huang ,  Yi-Wen Chiu ,  Hsi-Ho Hsu

发明人： Chih-Wan Hsu ,  Nung-Te Huang ,  Yi-Wen Chiu ,  Hsi-Ho Hsu

IPC分类号： H02J7/00

CPC分类号： H02J1/14 ,  H02J7/34 ,  H02J9/06

摘要： A power management method and an electronic system using the same are provided. The electronic system includes a display device and an auxiliary device, and has dual batteries and two subsystems. By detection and control mechanisms of the subsystems, the electronic system may allow the display device to maintain in a full power state, in the case where the external power is available or the power of the auxiliary device is sufficient. On the other hand, the auxiliary device may apply to the display device, such as a notebook computer, and the battery time may also be extended since the computer has two batteries.

摘要翻译： 提供电源管理方法和使用其的电子系统。 电子系统包括显示装置和辅助装置，并具有双电池和两个子系统。 通过子系统的检测和控制机制，在外部电源可用或辅助设备的电力足够的情况下，电子系统可以允许显示设备维持在全功率状态。 另一方面，辅助设备可以应用于诸如笔记本电脑的显示设备，并且由于计算机具有两个电池，所以电池时间也可以延长。

公开(公告)号：US08975871B2

公开(公告)日：2015-03-10

申请号：US13477067

申请日：2012-05-22

申请人： Chih-Wan Hsu ,  Nung-Te Huang ,  Yi-Wen Chiu ,  Hsi-Ho Hsu

发明人： Chih-Wan Hsu ,  Nung-Te Huang ,  Yi-Wen Chiu ,  Hsi-Ho Hsu

IPC分类号： H02J7/00 ,  H02J1/14 ,  H02J7/34 ,  H02J9/06

CPC分类号： H02J1/14 ,  H02J7/34 ,  H02J9/06

摘要： A power management method and an electronic system using the same are provided. The electronic system includes a display device and an auxiliary device, and has dual batteries and two subsystems. By detection and control mechanisms of the subsystems, the electronic system may allow the display device to maintain in a full power state, in the case where the external power is available or the power of the auxiliary device is sufficient. On the other hand, the auxiliary device may apply to the display device, such as a notebook computer, and the battery time may also be extended since the computer has two batteries.

摘要翻译： 提供电源管理方法和使用其的电子系统。 电子系统包括显示装置和辅助装置，并具有双电池和两个子系统。 通过子系统的检测和控制机制，在外部电源可用或辅助设备的电力足够的情况下，电子系统可以允许显示设备维持在全功率状态。 另一方面，辅助设备可以应用于诸如笔记本电脑的显示设备，并且由于计算机具有两个电池，所以电池时间也可以延长。

公开(公告)号：US07859325B2

公开(公告)日：2010-12-28

申请号：US12815719

申请日：2010-06-15

申请人： Yi-Wen Chiu ,  Chih-Wan Hsu ,  Hsi-Ho Hsu

发明人： Yi-Wen Chiu ,  Chih-Wan Hsu ,  Hsi-Ho Hsu

IPC分类号： G05F1/10

CPC分类号： G05F1/575

摘要： A CPU core voltage supply circuit includes a reference voltage generator, a differential operation amplifier, a power element, a feedback circuit and a first capacitor. The reference voltage generator outputs a first reference voltage. The differential operation amplifier has a positive input end, a negative input end and an output end. The positive input end is connected to the reference voltage generator for receiving the first reference voltage. The power element has a receiving terminal and a current output terminal. The receiving terminal is connected to the output end of the differential operation amplifier. The feedback circuit is connected to the current output terminal and outputs a feedback voltage to the negative input end of the differential operation amplifier. The first capacitor has an end connected to the current output terminal of the power element and the other end receiving a first voltage, thereby providing a CPU core voltage.

公开(公告)号：US20100257383A1

公开(公告)日：2010-10-07

申请号：US12815719

申请日：2010-06-15

申请人： Yi-Wen Chiu ,  Chih-Wan Hsu ,  Hsi-Ho Hsu

发明人： Yi-Wen Chiu ,  Chih-Wan Hsu ,  Hsi-Ho Hsu

IPC分类号： G06F1/26

CPC分类号： G05F1/575

摘要： A CPU core voltage supply circuit includes a reference voltage generator, a differential operation amplifier, a power element, a feedback circuit and a first capacitor. The reference voltage generator outputs a first reference voltage. The differential operation amplifier has a positive input end, a negative input end and an output end. The positive input end is connected to the reference voltage generator for receiving the first reference voltage. The power element has a receiving terminal and a current output terminal. The receiving terminal is connected to the output end of the differential operation amplifier. The feedback circuit is connected to the current output terminal and outputs a feedback voltage to the negative input end of the differential operation amplifier. The first capacitor has an end connected to the current output terminal of the power element and the other end receiving a first voltage, thereby providing a CPU core voltage.

摘要翻译： CPU核心电压电源电路包括参考电压发生器，差分运算放大器，功率元件，反馈电路和第一电容器。 参考电压发生器输出第一参考电压。 差分运算放大器具有正输入端，负输入端和输出端。 正输入端连接到参考电压发生器，用于接收第一参考电压。 功率元件具有接收端子和电流输出端子。 接收端子连接到差分运算放大器的输出端。 反馈电路连接到电流输出端子，并将反馈电压输出到差分运算放大器的负输入端。 第一电容器的端部连接到功率元件的电流输出端子，另一端接收第一电压，从而提供CPU内核电压。

公开(公告)号：US07764111B2

公开(公告)日：2010-07-27

申请号：US12238126

申请日：2008-09-25

申请人： Yi-Wen Chiu ,  Chih-Wan Hsu ,  Hsi-Ho Hsu

发明人： Yi-Wen Chiu ,  Chih-Wan Hsu ,  Hsi-Ho Hsu

IPC分类号： G05F1/10

CPC分类号： G05F1/575

摘要： A CPU core voltage supply circuit includes a reference voltage generator, a differential operation amplifier, a power element, a feedback circuit and a first capacitor. The reference voltage generator outputs a first reference voltage. The differential operation amplifier has a positive input end, a negative input end and an output end. The positive input end is connected to the reference voltage generator for receiving the first reference voltage. The power element has a receiving terminal and a current output terminal. The receiving terminal is connected to the output end of the differential operation amplifier. The feedback circuit is connected to the current output terminal and outputs a feedback voltage to the negative input end of the differential operation amplifier. The first capacitor has an end connected to the current output terminal of the power element and the other end receiving a first voltage, thereby providing a CPU core voltage.

摘要翻译： CPU核心电压电源电路包括参考电压发生器，差分运算放大器，功率元件，反馈电路和第一电容器。 参考电压发生器输出第一参考电压。 差分运算放大器具有正输入端，负输入端和输出端。 正输入端连接到参考电压发生器，用于接收第一参考电压。 功率元件具有接收端子和电流输出端子。 接收端子连接到差分运算放大器的输出端。 反馈电路连接到电流输出端子，并将反馈电压输出到差分运算放大器的负输入端。 第一电容器的端部连接到功率元件的电流输出端子，另一端接收第一电压，从而提供CPU内核电压。

公开(公告)号：US20090167423A1

公开(公告)日：2009-07-02

申请号：US12238126

申请日：2008-09-25

申请人： Yi-Wen Chiu ,  Chih-Wan Hsu ,  Hsi-Ho Hsu

发明人： Yi-Wen Chiu ,  Chih-Wan Hsu ,  Hsi-Ho Hsu

IPC分类号： G05F1/10

CPC分类号： G05F1/575

摘要： A CPU core voltage supply circuit includes a reference voltage generator, a differential operation amplifier, a power element, a feedback circuit and a first capacitor. The reference voltage generator outputs a first reference voltage. The differential operation amplifier has a positive input end, a negative input end and an output end. The positive input end is connected to the reference voltage generator for receiving the first reference voltage. The power element has a receiving terminal and a current output terminal. The receiving terminal is connected to the output end of the differential operation amplifier. The feedback circuit is connected to the current output terminal and outputs a feedback voltage to the negative input end of the differential operation amplifier. The first capacitor has an end connected to the current output terminal of the power element and the other end receiving a first voltage, thereby providing a CPU core voltage.

摘要翻译： CPU核心电压电源电路包括参考电压发生器，差分运算放大器，功率元件，反馈电路和第一电容器。 参考电压发生器输出第一参考电压。 差分运算放大器具有正输入端，负输入端和输出端。 正输入端连接到参考电压发生器，用于接收第一参考电压。 功率元件具有接收端子和电流输出端子。 接收端子连接到差分运算放大器的输出端。 反馈电路连接到电流输出端子，并将反馈电压输出到差分运算放大器的负输入端。 第一电容器的端部连接到功率元件的电流输出端子，另一端接收第一电压，从而提供CPU内核电压。