公开(公告)号：US20070211540A1

公开(公告)日：2007-09-13

申请号：US11695668

申请日：2007-04-03

申请人： Ching Chung Lin ,  Ken Chen ,  Nai Kuo ,  Han Chen ,  Chun Hung ,  Wen Hsieh

发明人： Ching Chung Lin ,  Ken Chen ,  Nai Kuo ,  Han Chen ,  Chun Hung ,  Wen Hsieh

IPC分类号： G11C16/04

CPC分类号： G11C16/0491 ,  G11C16/0475 ,  G11C16/14

摘要： A virtual ground nitride read-only memory array has a matrix of nitride read-only memory cells in which during an erase operation the non-erasing side of nitride read-only memory cells are connected to a common node for enhancing the erase uniformity of the nitride read-only memory array. If an operation requests erasing on the left side of nitride read-only memory cells, a positive voltage is supplied from an internal power supply to the left side for each of the nitride read-only memory cells, and the right side for each of the nitride read-only memory cells is discharged to a common node. The voltage level of the common mode is selected to be sufficiently high in order to prevent from punch through while at the same time sufficiently low to maintain the lateral electric field for erase operation to function optimally.

摘要翻译： 虚拟氮化物只读存储器阵列具有氮化物只读存储器单元的矩阵，其中在擦除操作期间，氮化物只读存储器单元的非擦除侧连接到公共节点，以增强擦除均匀性 氮化物只读存储器阵列。 如果操作要求在氮化物只读存储单元的左侧擦除，则从内部电源向氮化物只读存储单元中的每一个向左侧提供正电压，并且对于每个 氮化物只读存储单元被放电到公共节点。 选择共模的电压足够高以防止穿通，同时足够低以保持用于擦除操作的横向电场最佳地起作用。

公开(公告)号：US20070053225A1

公开(公告)日：2007-03-08

申请号：US11210425

申请日：2005-08-24

申请人： Ching Lin ,  Ken Chen ,  Nai Kuo ,  Han Chen ,  Chun Hung ,  Wen Hsieh

发明人： Ching Lin ,  Ken Chen ,  Nai Kuo ,  Han Chen ,  Chun Hung ,  Wen Hsieh

IPC分类号： G11C16/04

CPC分类号： G11C16/0491 ,  G11C16/0475 ,  G11C16/14

摘要： A virtual ground NROM array has a matrix of NROM cells in which during an erase operation the non-erasing side of NROM cells are connected to a common node for enhancing the erase uniformity of the NROM array. If an operation requests erasing on the left side of NROM cells, a positive voltage is supplied from an internal power supply to the left side for each of the NROM cells, and the right side for each of the NROM cells is discharged to a common node. If an operation requests erasing the right side of NROM cells, a positive voltage is supplied from the internal power supply to the right side for each of the NROM cells, and the right side for each of the NROM cells is connected to the common node. The voltage level of the common mode is selected to be sufficiently high in order to prevent from punch through while at the same time sufficiently low to maintain the lateral electric field for erase operation to function optimally. In an alternative embodiment, non-erasing sides of NROM cells in the NROM array are connected to a current source during an erase operation for enhancing the erase uniformity of the NROM array. If an operation requests erasing the left side of NROM cells, a positive voltage is supplied from an internal power supply to the left side for each of the NROM cells, and the right side for each of the NROM cells is discharged to a current source. If an operation requests erasing the right side of NROM cells, a positive voltage is supplied from the internal power supply to the right side for each of the NROM cells, and the right side for each of the NROM cells is connected to the current source.

摘要翻译： 虚拟接地NROM阵列具有NROM单元的矩阵，其中在擦除操作期间，NROM单元的非擦除侧连接到公共节点，以增强NROM阵列的擦除均匀性。 如果操作请求在NROM单元的左侧擦除，则对于NROM单元中的每一个，从内部电源向左侧提供正电压，并且将NROM单元中的每一个的右侧放电到公共节点 。 如果操作请求擦除NROM单元的右侧，则对于每个NROM单元，从内部电源向右侧提供正电压，并且每个NROM单元的右侧连接到公共节点。 选择共模的电压足够高以防止穿通，同时足够低以保持用于擦除操作的横向电场最佳地起作用。 在替代实施例中，在擦除操作期间，NROM阵列中的NROM单元的不擦除侧连接到电流源，以增强NROM阵列的擦除均匀性。 如果操作请求擦除NROM单元的左侧，则从NROM单元的每一个的内部电源向左侧提供正电压，并且将NROM单元中的每一个的右侧放电到电流源。 如果操作请求擦除NROM单元的右侧，则从NROM单元的每一个向内部电源向右侧提供正电压，并且每个NROM单元的右侧连接到电流源。