Method of forming dummy pattern
    1.
    发明授权
    Method of forming dummy pattern 有权
    形成虚拟图案的方法

    公开(公告)号:US07849436B2

    公开(公告)日:2010-12-07

    申请号:US11889384

    申请日:2007-08-13

    申请人: Choi Jae Young

    发明人: Choi Jae Young

    IPC分类号: G06F17/50

    CPC分类号: H01L21/31053

    摘要: A method of forming a dummy pattern on a mask for fabricating a semiconductor device is disclosed. The method may include a step of calculating a distance in a device isolation area between a first chip area and a second chip area having different pattern densities. In addition, the method may include comparing the distance and a first reference distance. The method may further include forming the dummy pattern in the device isolation area based on the comparison result. The dummy pattern may have a plurality of partitions. Each of the plurality of partitions may have a pattern density according to a position of the partition. A quantity of the partitions may be based on the comparison result. And at least one partition may have a pattern density which is substantially equal to an average of the pattern densities of the first and the second chip areas.

    摘要翻译: 公开了一种在用于制造半导体器件的掩模上形成虚设图案的方法。 该方法可以包括计算具有不同图案密度的第一芯片区域和第二芯片区域之间的器件隔离区域中的距离的步骤。 此外,该方法可以包括比较距离和第一参考距离。 该方法还可以包括基于比较结果在设备隔离区域中形成虚设图案。 虚拟图案可以具有多个分区。 多个分区中的每一个可以具有根据分区的位置的图案密度。 一定数量的分区可以基于比较结果。 并且至少一个分区可以具有基本上等于第一和第二芯片区域的图案密度的平均值的图案密度。

    Method of forming dummy pattern
    2.
    发明申请
    Method of forming dummy pattern 有权
    形成虚拟图案的方法

    公开(公告)号:US20080038847A1

    公开(公告)日:2008-02-14

    申请号:US11889384

    申请日:2007-08-13

    申请人: Choi Jae Young

    发明人: Choi Jae Young

    IPC分类号: H01L21/31 H01L21/02

    CPC分类号: H01L21/31053

    摘要: A method for forming a dummy pattern according to the embodiment comprises the step of: for first chip area and second chip area in which devices are formed, forming the dummy pattern formed between a first chip area and a second chip area in a plurality of patterns having various pattern densities.

    摘要翻译: 根据实施例的用于形成虚设图案的方法包括以下步骤:对于形成设备的第一芯片区域和第二芯片区域,形成在多个图案中的第一芯片区域和第二芯片区域之间形成的虚拟图案 具有各种图案密度。