公开(公告)号：US08279645B2

公开(公告)日：2012-10-02

申请号：US13093629

申请日：2011-04-25

申请人： Christopher D. Bridge ,  Laszlo Balogh

发明人： Christopher D. Bridge ,  Laszlo Balogh

IPC分类号： H02M7/00

CPC分类号： H02M3/1584 ,  H02M2003/1586

摘要： In an embodiment, a power converter system includes a plurality of variable frequency power converters and a plurality of synchronization circuits. Each variable frequency power converter has a switching frequency. Each synchronization circuit is associated with a respective one of the plurality of variable frequency power converters. A control circuit is coupled to and coordinates the plurality of synchronization circuits. The plurality of synchronization circuits and the control circuit are operable to synchronize the switching frequencies of the variable frequency power converters to each other. Each synchronization circuit is operable to: receive a first input signal indicative of the beginning of a switching period for the associated variable frequency power converter; receive a second input signal indicative of the end of the switching period for the associated variable frequency power converter; generate a first output signal for directing a pulse width modulation of the associated variable frequency power converter; and generate a second output signal for coordinating a phase relationship with another variable frequency power converter in the system.

摘要翻译： 在一个实施例中，功率转换器系统包括多个可变频率功率转换器和多个同步电路。 每个可变频率功率转换器具有开关频率。 每个同步电路与多个可变频率功率转换器中的相应一个相关联。 控制电路耦合到并协调多个同步电路。 多个同步电路和控制电路可操作以使可变频率功率转换器的开关频率彼此同步。 每个同步电路可操作为：接收指示相关联的可变频率功率转换器的开关周期开始的第一输入信号; 接收指示所述相关联的可变频率功率转换器的开关周期结束的第二输入信号; 产生用于引导所述相关联的可变频率功率转换器的脉冲宽度调制的第一输出信号; 并产生用于与系统中的另一变频功率转换器协调相位关系的第二输出信号。

公开(公告)号：US20110199797A1

公开(公告)日：2011-08-18

申请号：US13093629

申请日：2011-04-25

申请人： Christopher D. Bridge ,  Laszlo Balogh

发明人： Christopher D. Bridge ,  Laszlo Balogh

IPC分类号： H02M7/00

CPC分类号： H02M3/1584 ,  H02M2003/1586

摘要： In an embodiment, a power converter system includes a plurality of variable frequency power converters and a plurality of synchronization circuits. Each variable frequency power converter has a switching frequency. Each synchronization circuit is associated with a respective one of the plurality of variable frequency power converters. A control circuit is coupled to and coordinates the plurality of synchronization circuits. The plurality of synchronization circuits and the control circuit are operable to synchronize the switching frequencies of the variable frequency power converters to each other. Each synchronization circuit is operable to: receive a first input signal indicative of the beginning of a switching period for the associated variable frequency power converter; receive a second input signal indicative of the end of the switching period for the associated variable frequency power converter; generate a first output signal for directing a pulse width modulation of the associated variable frequency power converter; and generate a second output signal for coordinating a phase relationship with another variable frequency power converter in the system.

摘要翻译： 在一个实施例中，功率转换器系统包括多个可变频率功率转换器和多个同步电路。 每个可变频率功率转换器具有开关频率。 每个同步电路与多个可变频率功率转换器中的相应一个相关联。 控制电路耦合到并协调多个同步电路。 多个同步电路和控制电路可操作以使可变频率功率转换器的开关频率彼此同步。 每个同步电路可操作为：接收指示相关联的可变频率功率转换器的开关周期开始的第一输入信号; 接收指示所述相关联的可变频率功率转换器的开关周期结束的第二输入信号; 产生用于引导所述相关联的可变频率功率转换器的脉冲宽度调制的第一输出信号; 并产生用于与系统中的另一变频功率转换器协调相位关系的第二输出信号。

公开(公告)号：US20090267658A1

公开(公告)日：2009-10-29

申请号：US12361419

申请日：2009-01-28

申请人： Christopher D. Bridge ,  Laszlo Balogh

发明人： Christopher D. Bridge ,  Laszlo Balogh

IPC分类号： H03L7/00

CPC分类号： H02M3/1584 ,  H02M2003/1586

摘要： In an embodiment, a power converter system includes a plurality of variable frequency power converters and a plurality of synchronization circuits. Each variable frequency power converter has a switching frequency. Each synchronization circuit is associated with a respective one of the plurality of variable frequency power converters. A control circuit is coupled to and coordinates the plurality of synchronization circuits. The plurality of synchronization circuits and the control circuit are operable to synchronize the switching frequencies of the variable frequency power converters to each other. Each synchronization circuit is operable to: receive a first input signal indicative of the beginning of a switching period for the associated variable frequency power converter; receive a second input signal indicative of the end of the switching period for the associated variable frequency power converter; generate a first output signal for directing a pulse width modulation of the associated variable frequency power converter; and generate a second output signal for coordinating a phase relationship with another variable frequency power converter in the system.

摘要翻译： 在一个实施例中，功率转换器系统包括多个可变频率功率转换器和多个同步电路。 每个可变频率功率转换器具有开关频率。 每个同步电路与多个可变频率功率转换器中的相应一个相关联。 控制电路耦合到并协调多个同步电路。 多个同步电路和控制电路可操作以使可变频率功率转换器的开关频率彼此同步。 每个同步电路可操作为：接收指示相关联的可变频率功率转换器的开关周期开始的第一输入信号; 接收指示所述相关联的可变频率功率转换器的开关周期结束的第二输入信号; 产生用于引导所述相关联的可变频率功率转换器的脉冲宽度调制的第一输出信号; 并产生用于与系统中的另一变频功率转换器协调相位关系的第二输出信号。

公开(公告)号：US07933132B2

公开(公告)日：2011-04-26

申请号：US12361419

申请日：2009-01-28

申请人： Christopher D. Bridge ,  Laszlo Balogh

发明人： Christopher D. Bridge ,  Laszlo Balogh

IPC分类号： H02M7/00

CPC分类号： H02M3/1584 ,  H02M2003/1586

摘要： In an embodiment, a power converter system includes a plurality of variable frequency power converters and a plurality of synchronization circuits. Each variable frequency power converter has a switching frequency. Each synchronization circuit is associated with a respective one of the plurality of variable frequency power converters. A control circuit is coupled to and coordinates the plurality of synchronization circuits. The plurality of synchronization circuits and the control circuit are operable to synchronize the switching frequencies of the variable frequency power converters to each other. Each synchronization circuit is operable to: receive a first input signal indicative of the beginning of a switching period for the associated variable frequency power converter; receive a second input signal indicative of the end of the switching period for the associated variable frequency power converter; generate a first output signal for directing a pulse width modulation of the associated variable frequency power converter; and generate a second output signal for coordinating a phase relationship with another variable frequency power converter in the system.

摘要翻译： 在一个实施例中，功率转换器系统包括多个可变频率功率转换器和多个同步电路。 每个可变频率功率转换器具有开关频率。 每个同步电路与多个可变频率功率转换器中的相应一个相关联。 控制电路耦合到并协调多个同步电路。 多个同步电路和控制电路可操作以使可变频率功率转换器的开关频率彼此同步。 每个同步电路可操作为：接收指示相关联的可变频率功率转换器的开关周期开始的第一输入信号; 接收指示所述相关联的可变频率功率转换器的开关周期结束的第二输入信号; 产生用于引导所述相关联的可变频率功率转换器的脉冲宽度调制的第一输出信号; 并产生用于与系统中的另一变频功率转换器协调相位关系的第二输出信号。

公开(公告)号：US06246592B1

公开(公告)日：2001-06-12

申请号：US09598555

申请日：2000-06-21

申请人： Laszlo Balogh ,  Christopher D. Bridge ,  William M. Andreycak

发明人： Laszlo Balogh ,  Christopher D. Bridge ,  William M. Andreycak

IPC分类号： H02M3335

CPC分类号： H02M3/33592 ,  H02M2001/007 ,  Y02B70/1475

摘要： A power supply having a transformer-coupled power converter cascaded with a buck power converter. The transformer-coupled power converter operates in a free-running mode at a nearly 100% maximum duty cycle to convert an input voltage to an intermediate voltage. The buck power converter produces a regulated output voltage from the intermediate voltage. The power supply further includes a pulse width modulation (PWM) controller employing leading-edge modulation of complementary control signals used to control buck switches in the buck converter. The PWM controller is synchronized to primary-side free-running switches of the transformer-coupled power converter by a synchronization signal that is fed-forward across an isolation boundary via a signal transformer. The power supply also may also employ a soft-switching technique to reduce switching losses.

摘要翻译： 具有与降压功率转换器级联的变压器耦合功率转换器的电源。 变压器耦合功率转换器在自由运行模式下工作在几乎100％的最大占空比，将输入电压转换成中间电压。 降压功率转换器从中间电压产生稳定的输出电压。 电源还包括采用用于控制降压转换器中的降压开关的互补控制信号的前沿调制的脉宽调制（PWM）控制器。 PWM控制器通过同步信号与变压器耦合功率转换器的初级侧自由运行开关同步，该同步信号通过信号变压器跨越隔离边界。 电源还可以采用软切换技术来减少开关损耗。

公开(公告)号：US20110175582A1

公开(公告)日：2011-07-21

申请号：US13012453

申请日：2011-01-24

申请人： Paul W. Latham ,  Stewart Kenly ,  Laszlo Balogh

发明人： Paul W. Latham ,  Stewart Kenly ,  Laszlo Balogh

IPC分类号： G05F1/10

CPC分类号： H02M3/1588 ,  Y02B70/1466

摘要： A system includes a first switch connected to a voltage input and a switching node. A second switch is connected to the switching node and a reference potential. A first circuit generates first rising edges and first falling edges by comparing a voltage at the switching node to a first voltage reference. The first voltage reference is between the reference potential and the voltage input. A second circuit generates second rising edges and second falling edges by comparing the switching node voltage to a second voltage reference. The second voltage reference is less than the reference potential. The controller calculates delay times based on the first rising edges, the first falling edges, the second rising edges and the second falling edges. The controller generates drive signals for the first switch and the second switch based on a duty cycle and the delay times.

摘要翻译： 系统包括连接到电压输入和开关节点的第一开关。 第二开关连接到开关节点和参考电位。 第一电路通过将开关节点处的电压与第一参考电压进行比较来产生第一上升沿和第一下降沿。 第一个参考电压在参考电位和电压输入之间。 第二电路通过将开关节点电压与第二参考电压进行比较来产生第二上升沿和第二下降沿。 第二个参考电压小于参考电位。 控制器基于第一上升沿，第一下降沿，第二上升沿和第二下降沿计算延迟时间。 控制器基于占空比和延迟时间产生第一开关和第二开关的驱动信号。

公开(公告)号：US08164320B2

公开(公告)日：2012-04-24

申请号：US13012453

申请日：2011-01-24

申请人： Paul W. Latham, II ,  Stewart Kenly ,  Laszlo Balogh

发明人： Paul W. Latham, II ,  Stewart Kenly ,  Laszlo Balogh

IPC分类号： G05F1/00

CPC分类号： H02M3/1588 ,  Y02B70/1466

摘要： A system includes a first switch connected to a voltage input and a switching node. A second switch is connected to the switching node and a reference potential. A first circuit generates first rising edges and first falling edges by comparing a voltage at the switching node to a first voltage reference. The first voltage reference is between the reference potential and the voltage input. A second circuit generates second rising edges and second falling edges by comparing the switching node voltage to a second voltage reference. The second voltage reference is less than the reference potential. The controller calculates delay times based on the first rising edges, the first falling edges, the second rising edges and the second falling edges. The controller generates drive signals for the first switch and the second switch based on a duty cycle and the delay times.

摘要翻译： 系统包括连接到电压输入和开关节点的第一开关。 第二开关连接到开关节点和参考电位。 第一电路通过将开关节点处的电压与第一参考电压进行比较来产生第一上升沿和第一下降沿。 第一个参考电压在参考电位和电压输入之间。 第二电路通过将开关节点电压与第二参考电压进行比较来产生第二上升沿和第二下降沿。 第二个参考电压小于参考电位。 控制器基于第一上升沿，第一下降沿，第二上升沿和第二下降沿计算延迟时间。 控制器基于占空比和延迟时间产生第一开关和第二开关的驱动信号。

公开(公告)号：US20090160412A1

公开(公告)日：2009-06-25

申请号：US11962571

申请日：2007-12-21

申请人： Paul W. Latham ,  Stewart Kenly ,  Laszlo Balogh

发明人： Paul W. Latham ,  Stewart Kenly ,  Laszlo Balogh

IPC分类号： H02J1/00

CPC分类号： H02M3/1588 ,  Y02B70/1466

摘要： Systems and methods for controlling timing of switches in power regulator/power amplifiers.

摘要翻译： 用于控制功率调节器/功率放大器中开关时序的系统和方法。

公开(公告)号：US6144245A

公开(公告)日：2000-11-07

申请号：US106368

申请日：1998-06-29

申请人： Laszlo Balogh

发明人： Laszlo Balogh

IPC分类号： H03K17/082 ,  H03K17/16

CPC分类号： H03K17/0822 ,  H03K17/161

摘要： Leading-edge blanking circuits blank the leading edge of a current sense signal generated by sensing circuitry sensing the current through a switching field-effect transistor. A current sensor is employed to sense the magnitude of gate current being provided to the gate of the switching transistor by a driver circuit. A comparator indicates whether the sensed magnitude of the gate current exceeds a predetermined threshold current. A blanking circuit component, such as a transistor connected to ground, is also used. In one blanking circuit, the blanking component forces the current sense signal to zero when the comparator indicates that the gate current of the switching transistor exceeds the threshold current, and otherwise allows the value of the current sense signal to be determined by the current-sensing circuitry. In another blanking circuit, a latch is interposed between the comparator and the blanking component. The latch generates a blanking control signal to control the blanking component. The blanking control signal becomes asserted upon the assertion of a switching-control signal that controls the driver circuit, and becomes deasserted when the comparator indicates that the gate current of the switching transistor has diminished to below the threshold current. In both circuits the blanking interval ends when the gate current has sufficiently diminished, indicating that the initial spike in the switching transistor current has subsided.

摘要翻译： 前沿消隐电路消除由感测电路产生的电流感测信号的前沿，该感测电路感测通过开关场效应晶体管的电流。 采用电流传感器来检测由驱动电路提供给开关晶体管的栅极的栅极电流的幅度。 比较器指示检测到的栅极电流的大小是否超过预定阈值电流。 还使用消隐电路部件，例如连接到地的晶体管。 在一个消隐电路中，当比较器指示开关晶体管的栅极电流超过阈值电流时，消隐部件将电流检测信号强制为零，否则允许电流检测信号的值由电流检测 电路。 在另一个消隐电路中，锁存器插在比较器和消隐部件之间。 锁存器产生消隐控制信号以控制消隐部件。 当控制驱动器电路的开关控制信号被断言时，消隐控制信号变为有效，当比较器指示开关晶体管的栅极电流已经降低到阈值电流以下时，消隐控制信号变为无效。 在两个电路中，当栅极电流已经充分减小时，消隐间隔结束，表明开关晶体管电流的初始尖峰已经消退。

公开(公告)号：US5198969A

公开(公告)日：1993-03-30

申请号：US821324

申请日：1992-01-13

申请人： Richard Redl ,  Laszlo Balogh

发明人： Richard Redl ,  Laszlo Balogh

IPC分类号： H02M3/337 ,  H03K17/00 ,  H03K17/0814

CPC分类号： H03K17/08142 ,  H02M3/337 ,  H03K2217/0036

摘要： The addition of an external commutating inductor and two clamp diodes to the phase-shifted PWM full-bridge dc/dc converter substantially reduces the switching losses of the transistors and the rectifier diodes, under all loading conditions. We give analyses, practical design considerations, and experimental results for a 1.5-kW converter with 60-V, 25-A output, operating at 100-kHz clock frequency and 95% efficiency.

摘要翻译： 在所有负载条件下，相移PWM全桥dc / dc转换器外加一个外部整流电感和两个钳位二极管大大降低了晶体管和整流二极管的开关损耗。 我们为具有60 V，25 A输出的1.5 kW转换器提供分析，实际设计考虑和实验结果，以100 kHz时钟频率和95％的效率运行。