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公开(公告)号:US20130130456A1
公开(公告)日:2013-05-23
申请号:US13722142
申请日:2012-12-20
申请人: Chung-Cheng WU , Ali KESHAVARZI , Fung Ka HING , Ta-Pen GUO , Jiann-Tyng TZENG , Yen-Ming CHEN , Shyue-Shyh LIN , Shyh-Wei WANG , Sheng-Jier YANG , Hsiang-Jen TSENG , David B. Scott , Min CAO
发明人: Chung-Cheng WU , Ali KESHAVARZI , Fung Ka HING , Ta-Pen GUO , Jiann-Tyng TZENG , Yen-Ming CHEN , Shyue-Shyh LIN , Shyh-Wei WANG , Sheng-Jier YANG , Hsiang-Jen TSENG , David B. Scott , Min CAO
IPC分类号: H01L29/66
CPC分类号: H01L29/665 , H01L21/823807 , H01L21/823814 , H01L21/823871 , H01L23/485 , H01L27/0207 , H01L27/092 , H01L29/7848 , H01L2224/16225
摘要: A method of forming an integrated circuit including forming a first diffusion area and a second diffusion area on a substrate, wherein the first diffusion area is configured for a first type transistor, the second diffusion area is configured for a second type transistor. The method further includes forming first source and drain regions in the first diffusion area. The method further includes forming second source and drain regions in the second diffusion area. The method further includes forming a gate electrode extending across the first diffusion area and the second diffusion area. The method further includes forming a first metallic layer, a second metallic layer, and a third metallic layer. The first metallic layer is electrically coupled with the first source region. The second metallic layer is electrically coupled with the first and second drain regions. The third metallic layer is electrically coupled with the second source region.
摘要翻译: 一种形成集成电路的方法,包括在衬底上形成第一扩散区域和第二扩散区域,其中所述第一扩散区域被配置为用于第一类型晶体管,所述第二扩散区域被配置为用于第二类型晶体管。 该方法还包括在第一扩散区域中形成第一源区和漏区。 该方法还包括在第二扩散区域中形成第二源区和漏区。 该方法还包括形成跨越第一扩散区域和第二扩散区域延伸的栅电极。 该方法还包括形成第一金属层,第二金属层和第三金属层。 第一金属层与第一源区电耦合。 第二金属层与第一和第二漏极区域电耦合。 第三金属层与第二源极区域电耦合。
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公开(公告)号:US20110291197A1
公开(公告)日:2011-12-01
申请号:US12787966
申请日:2010-05-26
申请人: Chung-Cheng WU , Ali KESHAVARZI , Ka Hing FUNG , Ta-Pen GUO , Jiann-Tyng TZENG , Yen-Ming CHEN , Shyue-Shyh LIN , Shyh-Wei WANG , Sheng-Jier YANG , Hsiang-Jen TSENG , David B. SCOTT , Min CAO
发明人: Chung-Cheng WU , Ali KESHAVARZI , Ka Hing FUNG , Ta-Pen GUO , Jiann-Tyng TZENG , Yen-Ming CHEN , Shyue-Shyh LIN , Shyh-Wei WANG , Sheng-Jier YANG , Hsiang-Jen TSENG , David B. SCOTT , Min CAO
IPC分类号: H01L27/088 , H01L21/8234
CPC分类号: H01L29/665 , H01L21/823807 , H01L21/823814 , H01L21/823871 , H01L23/485 , H01L27/0207 , H01L27/092 , H01L29/7848 , H01L2224/16225
摘要: An integrated circuit includes a first diffusion area for a first type transistor. The first type transistor includes a first drain region and a first source region. A second diffusion area for a second type transistor is spaced from the first diffusion area. The second type transistor includes a second drain region and a second source region. A gate electrode continuously extends across the first diffusion area and the second diffusion area in a routing direction. The first metallic layer is electrically coupled with the first source region. The first metallic layer and the first diffusion area overlap with a first distance. A second metallic layer is electrically coupled with the first drain region and the second drain region. The second metallic layer and the first diffusion area overlap with a second distance. The first distance is larger than the second distance.
摘要翻译: 集成电路包括用于第一类型晶体管的第一扩散区域。 第一类型晶体管包括第一漏极区域和第一源极区域。 用于第二类型晶体管的第二扩散区域与第一扩散区域间隔开。 第二类型晶体管包括第二漏极区域和第二源极区域。 栅电极在布线方向上连续延伸穿过第一扩散区域和第二扩散区域。 第一金属层与第一源区电耦合。 第一金属层和第一扩散区域与第一距离重叠。 第二金属层与第一漏极区域和第二漏极区域电耦合。 第二金属层和第一扩散区域与第二距离重叠。 第一距离大于第二距离。
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