公开(公告)号：US20120302038A1

公开(公告)日：2012-11-29

申请号：US13339404

申请日：2011-12-29

申请人： Chunsheng ZHENG ,  Wenguang ZHANG ,  Qiang XU ,  Yuwen CHEN

发明人： Chunsheng ZHENG ,  Wenguang ZHANG ,  Qiang XU ,  Yuwen CHEN

IPC分类号： H01L21/302

CPC分类号： H01L21/76237 ,  H01L21/31155 ,  H01L21/823807 ,  H01L21/823878 ,  H01L29/7846

摘要： A method for preparing a shallow trench isolation structure with the stress of its isolation oxide being tuned by ion implantation comprises: step a: forming a protective layer on a semiconductor substrate; step b: forming trenches for isolating PMOS active regions and NMOS active regions on the semiconductor substrate and the protective layer; step c: forming a filling material layer in the trenches, so that the trenches are fully filled with the filling material layer to form shallow trench isolation structures. The advantageous is that, as for a device where a HARP process is applied to its shallow trench isolation, the stress in the STI can be tuned so as to be changed from tensile stress into compressive stress by performing ion implantation to the STI around the PMOS, therefore the stress state of the PMOS channel region may be changed and the performance thereof is improved.

摘要翻译： 通过离子注入来调节其隔离氧化物的应力的浅沟槽隔离结构的制备方法包括：步骤a：在半导体衬底上形成保护层; 步骤b：形成用于隔离半导体衬底和保护层上的PMOS有源区和NMOS有源区的沟槽; 步骤c：在沟槽中形成填充材料层，使得沟槽被填充材料层完全填充以形成浅沟槽隔离结构。 有利的是，对于将HARP工艺应用于其浅沟槽隔离的器件，可以调节STI中的应力，以便通过对PMOS周围的STI进行离子注入，将其从拉伸应力变为压应力 因此，可以改变PMOS沟道区的应力状态并提高其性能。

公开(公告)号：US20120322222A1

公开(公告)日：2012-12-20

申请号：US13339406

申请日：2011-12-29

申请人： Qiang XU ,  Wenguang ZHANG ,  Chunsheng ZHENG ,  Yuwen CHEN

发明人： Qiang XU ,  Wenguang ZHANG ,  Chunsheng ZHENG ,  Yuwen CHEN

IPC分类号： H01L21/02

CPC分类号： H01L28/40 ,  C23C16/345 ,  C23C16/45523 ,  C23C16/505 ,  C23C16/56

摘要： A method for improving capacitance uniformity in a MIM device, mainly for the purpose of improving uniformity of a thin film within the MIM device, includes eight steps in order and step S2-step S6 may be repeated for several times as needed. According to the method for improving capacitance uniformity in a MIM device of the present invention, a certain quantity of defects in the thin film are removed by means of several times of deposition/plasma processes based on the current PECVD, and uniformity of the deposited thin film is increased, thereby improving uniformity in wet etching rate of the thin film and further improving capacitance uniformity in the MIM device.

摘要翻译： 主要用于提高MIM器件内的薄膜均匀性的MIM器件中的电容均匀性的改善方法包括8个步骤，并且步骤S2的步骤S6可根据需要重复多次。 根据本发明的MIM器件中的电容均匀性的提高方法，通过基于当前PECVD的多次沉积/等离子体处理，去除薄膜中的一定量的缺陷，并且沉积的薄膜 膜增加，从而提高了薄膜的湿蚀刻速度的均匀性，并且进一步提高了MIM器件中的电容均匀性。