公开(公告)号：US20030196130A1

公开(公告)日：2003-10-16

申请号：US10424397

申请日：2003-04-28

Applicant: Cirrus Logic, Inc.

Inventor： Douglas F. Pastorello

IPC: G06F001/12

CPC classification number: G06F13/4291

Abstract: Byte synchronization between a bus master and a serial interface or other bus slave is maintained and promptly corrected by using a unique signal, issued by the serial interface, to promptly and unambiguously notify the bus master of a loss of synchronization, followed by prompt resynchronization by the bus master. The serial interface sets a selected indicium in a status register equal to a selected value, when an invalid command is sensed at the interface. The bus master reads the status register and, when the selected indicium has the selected value, promptly resynchronizes the serial interface without further delay.

Abstract translation: 总线主机和串行接口或其他总线从站之间的字节同步通过使用由串行接口发出的唯一信号进行维护并及时纠正，以及时，明确地通知总线主机失去同步，然后立即重新同步 总线主人。 串行接口在接口上检测到无效命令时，将状态寄存器中的选定标记设置为等于所选值。 总线主控器读取状态寄存器，当所选标记具有所选值时，会立即重新同步串行接口，而不会再延迟。