公开(公告)号：US09300275B1

公开(公告)日：2016-03-29

申请号：US14339879

申请日：2014-07-24

Applicant: Cirrus Logic, Inc.

Inventor： Bhoodev Kumar ,  Saurabh Singh ,  Lei Zhu

IPC: H03K3/00 ,  H03K3/012 ,  G06F17/50

CPC classification number: G06F17/505 ,  G01R31/318541 ,  H03K3/012

Abstract: In accordance with embodiments of the present disclosure, a multi-bit pulsed latch circuit for an integrated circuit design system may include a pulse generator and a plurality of latches. The pulse generator may be configured to generate pulses. The plurality of latches may operate as storage elements and are coupled to the pulse generator in a manner so that the multi-bit pulsed latch circuit provides functionality of at least two flip flop elements, wherein the multi-bit pulsed latch circuit can replace the at least two flip flop elements that normally would be used by the integrated circuit design system.

Abstract translation: 根据本公开的实施例，用于集成电路设计系统的多位脉冲锁存电路可以包括脉冲发生器和多个锁存器。 脉冲发生器可以被配置为产生脉冲。 多个锁存器可以作为存储元件工作，并且以这样的方式耦合到脉冲发生器，使得多位脉冲锁存电路提供至少两个触发器元件的功能，其中多位脉冲锁存电路可以代替at 通常将由集成电路设计系统使用的至少两个触发器元件。

公开(公告)号：US09633156B1

公开(公告)日：2017-04-25

申请号：US15047033

申请日：2016-02-18

Applicant: Cirrus Logic, Inc.

Inventor： Bhoodev Kumar ,  Saurabh Singh ,  Lei Zhu

IPC: H03K3/00 ,  G06F17/50

CPC classification number: G06F17/505 ,  G01R31/318541 ,  H03K3/012

Abstract: In accordance with embodiments of the present disclosure, a multi-bit pulsed latch circuit for an integrated circuit design system may include a pulse generator and a plurality of latches. The pulse generator may be configured to generate pulses. The plurality of latches may operate as storage elements and are coupled to the pulse generator in a manner so that the multi-bit pulsed latch circuit provides functionality of at least two flip flop elements, wherein the multi-bit pulsed latch circuit can replace the at least two flip flop elements that normally would be used by the integrated circuit design system.