公开(公告)号：US20210333310A1

公开(公告)日：2021-10-28

申请号：US17129113

申请日：2020-12-21

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Dipankar NAG ,  Peter HSU ,  Kapil R. SHARMA ,  Gordon J. BATES ,  Simon R. FOSTER ,  Mark J. MCCLOY-STEVENS

IPC: G01R19/25 ,  H03F3/45

Abstract: The present application relates to current sensing circuitry (100) that comprises a differential amplifier (110) comprising first and second inputs configured to sense a current across a sense resistance, and an output configured to output a current sense signal. The circuitry (100) further comprises a first current source, a second current source and a switch network operable in: a first phase in which the first current source is connected to the first input and disconnected from the output, and the second current source is connected to the output and disconnected from the first input; and a second phase in which the first current source is connected to the output and disconnected from the first input, and the second current source is connected to the first input and disconnected from the output.

公开(公告)号：US20240044954A1

公开(公告)日：2024-02-08

申请号：US18484873

申请日：2023-10-11

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Dipankar NAG ,  Peter HSU ,  Kapil R. SHARMA ,  Gordon J. BATES ,  Simon R. FOSTER ,  Mark J. MCCLOY-STEVENS

IPC: G01R19/25 ,  H03F3/45

CPC classification number: G01R19/2509 ,  H03F3/45475 ,  G01R19/0053

Abstract: The present application relates to current sensing circuitry (100) that comprises a differential amplifier (110) comprising first and second inputs configured to sense a current across a sense resistance, and an output configured to output a current sense signal. The circuitry (100) further comprises a first current source, a second current source and a switch network operable in: a first phase in which the first current source is connected to the first input and disconnected from the output, and the second current source is connected to the output and disconnected from the first input; and a second phase in which the first current source is connected to the output and disconnected from the first input, and the second current source is connected to the first input and disconnected from the output.