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公开(公告)号:US20240429729A1
公开(公告)日:2024-12-26
申请号:US18338090
申请日:2023-06-20
Inventor: Paulo Gustavo RAYMUNDO SILVA , Jason W. LAWRENCE , Mucahit KOZAK , Graeme G. MACKAY
IPC: H02J7/00
Abstract: A controller for generating a control parameter of a feedback system may include a proportional path comprising a first selector configured to select one of a plurality of proportional signals to generate a proportional path output, wherein each of the proportional signals is based on a respective one of a plurality of error signals, each of the plurality of error signals associated with a respective regulated physical quantity, an integral path comprising a second selector configured to select one of a plurality of integral signals as a second selector output, wherein each of the integral signals is based on a respective one of the plurality of error signals and a single integrator configured to accumulate successive samples of the second selector output to generate an integral path output, and combiner logic configured to combine the proportional path output and the integral path output to generate the control parameter.
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公开(公告)号:US20230179217A1
公开(公告)日:2023-06-08
申请号:US17987448
申请日:2022-11-15
Inventor: Paul WILSON , James T. DEAS , Mucahit KOZAK , Graeme G. MACKAY
CPC classification number: H03M1/1023 , H03M1/0609
Abstract: Coulomb counter circuitry operable in a first mode of operation and a second mode of operation, the coulomb counter circuitry comprising: first analog to digital converter (ADC) circuitry configured to generate a first ADC output signal indicative of a current through a load coupled to the coulomb counter circuitry; second analog to digital converter (ADC) circuitry; offset correction circuitry; and accumulator circuitry configured to generate a signal indicative of a cumulative amount of charge transferred to the load, wherein in the second mode of operation, the coulomb counter circuitry is operable to enable the second ADC circuitry and to generate an offset correction factor based at least in part on a second ADC output signal output by the second ADC circuitry, and wherein in subsequent operation of the coulomb counter circuitry in the first mode of operation, the offset correction circuitry applies the offset correction factor to the first ADC output signal.
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公开(公告)号:US20220263519A1
公开(公告)日:2022-08-18
申请号:US17667953
申请日:2022-02-09
Inventor: John L. MELANSON , Axel THOMSEN , Mucahit KOZAK , Paul WILSON , Eric J. KING
IPC: H03M3/00
Abstract: A signal processing system may include a sensor readout channel configured to convert an electronic signal into a digital quantity. The sensor readout channel may include a first-order sigma-delta modulator having a modulator input and a modulator output, first outside chopping switches located at the modulator input, second outside chopping switches located at the modulator output, an auxiliary path comprising an analog-to-digital converter (ADC) having an auxiliary path input and an auxiliary path output, the auxiliary path input configured to receive as its input signal a signal output by a memory element of the first-order sigma-delta modulator, and a signal combiner configured to combine a modulator output signal generated by the first-order sigma-delta modulator with an auxiliary path output signal generated by the auxiliary path to generate a combined output signal.
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