公开(公告)号：US11489534B1

公开(公告)日：2022-11-01

申请号：US17498183

申请日：2021-10-11

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Seung Bae Lee ,  Sunny Bhagia ,  Jaiminkumar Mehta ,  Anindya Bhattacharya ,  John L. Melanson

IPC: H03M1/06 ,  H03M1/08

Abstract: Digital-to-analog converter (DAC) architecture, comprising: a matrix DAC array comprising a plurality of cells arranged in a first dimension and a second dimension, each cell comprising a local decoder configured to transition the cell between at least two states; and decoding circuitry configured to: receive a digital input signal; and control the plurality of local decoders based on a received digital input signal, wherein each incremental change in the digital input signal results in a transition of a single cell of the plurality of cells such that the plurality of cells transition in sequence, the sequence of transitions of the plurality of cells defining a path through the DAC array; wherein when the path proceeds in the first dimension, the path proceeds to an adjacent cell of the plurality of cells at least 50% of the time; and wherein when the path proceeds in the second dimension, the path proceeds to an adjacent cell of the plurality of cells at least 50% of the time.