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公开(公告)号：US12176781B2
公开(公告)日：2024-12-24
申请号：US16816833
申请日：2020-03-12
Inventor： Eric Lindemann , John L. Melanson , Emmanuel Marchais , Carl Lennart Ståhl
Abstract: A system for estimating parameters of an electromagnetic load may include an input for receiving an input excitation signal to the electromagnetic load, a broadband content estimator that identifies at least one portion of the input excitation signal having broadband content, and a parameter estimator that uses the at least one portion of the input excitation signal to estimate and output one or more parameters of the electromagnetic load.
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公开(公告)号：US12085525B2
公开(公告)日：2024-09-10
申请号：US18470066
申请日：2023-09-19
Inventor： Tejasvi Das , Siddharth Maru , John L. Melanson
IPC: G01N27/02
CPC classification number: G01N27/025 , G01N27/028
Abstract: A system may include a resonant sensor configured to sense a physical quantity, a measurement circuit communicatively coupled to the resonant sensor and configured to measure one or more resonance parameters associated with the resonant sensor and indicative of the physical quantity using an incident/quadrature detector having an incident channel and a quadrature channel and perform a calibration of a non-ideality between the incident channel and the quadrature channel of the system, the calibration comprising determining the non-ideality by controlling the sensor signal, an oscillation signal for the incident channel, and an oscillation signal for the quadrature channel; and correcting for the non-ideality.
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公开(公告)号：US12009829B2
公开(公告)日：2024-06-11
申请号：US17980146
申请日：2022-11-03
Inventor： John L. Melanson , Lingli Zhang , Paul M. Astrachan , James Kelton
CPC classification number: H03M1/06 , H03M1/0607 , H03M1/0626 , H03M1/1023
Abstract: A digital-to-analog converter may include an integrator, an input network comprising a plurality of parallel taps, each member of the plurality of parallel taps having a signal delay such that at least two of the signal delays of the members of the plurality of parallel taps are different, and wherein each member of the plurality of parallel taps is coupled between an input of the digital-to-analog converter and an input of the integrator, and control circuitry configured to selectively enable and disable particular members of the plurality of parallel taps in order to program an effective input resistance of the input network to control an analog gain of the digital-to-analog converter, such that the control circuitry enables an even number of members at a time, with half of such enabled members in a first group and half of such enabled members in a second group.
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公开(公告)号：US11936373B2
公开(公告)日：2024-03-19
申请号：US17356606
申请日：2021-06-24
Inventor： Hamed Sadati , John A. Breslin , Sushanth Hegde , John L. Melanson
IPC: H03K17/30 , H03K17/042 , H03K17/06
CPC classification number: H03K17/302 , H03K17/04206 , H03K17/063
Abstract: Pre-conditioning circuitry for pre-conditioning a node of a circuit to support a change in operation of the circuit, wherein the circuit is operative to change a state of the node to effect the change in operation of the circuit, and wherein the pre-conditioning circuitry is configured to apply a voltage, current or charge directly to the node to reduce the magnitude of the change to the state of the node required by the circuit to achieve the change in operation of the circuit.
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公开(公告)号：US20230308060A1
公开(公告)日：2023-09-28
申请号：US18204356
申请日：2023-05-31
Inventor： John L. Melanson , Cory J. Peterson , Chandra Prakash , Ramin Zanbaghi , Eric Kimball
CPC classification number: H03F3/2178 , H03F1/26 , H03F3/187 , H03F2200/03
Abstract: Amplifier circuits provide operation with low-distortion zero crossings outside of a unipolar power supply voltage range. The amplifiers include multiple driver circuits and a control circuit. The control circuit selects between actively operating selected ones of the multiple driver circuits or all of the multiple driver circuits, according to an input signal to be reproduced by one or more of the multiple amplifier driver circuits. The control circuit determines a splice point at which the control circuit selects between actively operating selected ones of the multiple driver circuits or all of the multiple driver circuits.
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Patent Agency Ranking
公开(公告)号：US11722107B2
公开(公告)日：2023-08-08
申请号：US17589047
申请日：2022-01-31
Inventor： John L. Melanson , Cory J. Peterson , Chandra Prakash , Ramin Zanbaghi , Eric Kimball
CPC classification number: H03F3/2178 , H03F1/26 , H03F3/187 , H03F2200/03
Abstract: Class-D amplifier circuits provide operation with low-distortion zero crossings outside of a unipolar power supply voltage range. The amplifiers include a first H-bridge driver circuit and a second H-bridge driver circuit. The class-D amplifier circuits also include a control circuit having an input for receiving an input signal to be reproduced by the class-D amplifier circuit. The control circuit has outputs coupled to inputs of the first and second H-bridge drivers, and includes one or more modulators. The control circuit selects between actively operating a selected one of the driver circuits or both, according to the signal to be reproduced, while setting an unselected driver circuit to turn either a high-side switch or a low-side switch of the unselected one of the first driver circuit or the second driver circuit fully on for at least some cycles of the one or more modulators.
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公开(公告)号：US11552567B2
公开(公告)日：2023-01-10
申请号：US17218992
申请日：2021-03-31
Inventor： Xin Zhao , Jun Yan , Xiaofan Fei , Mark May , John L. Melanson
Abstract: A single-inductor multiple output (SIMO) switched-power DC-DC converter for a class-D amplifier provides outputs that are symmetric about a common-mode input voltage of the amplifier, while remaining asymmetric about a return terminal of the amplifier and switching converter. The DC-DC converter includes an inductive element, a switching circuit that energizes the inductive element from an input source, and a control circuit that controls the switching circuit. The control circuit may have multiple switching modes, and in one of the multiple switching modes, the switching circuit may couple the inductive element between outputs of the converter so that stored energy produces a differential change between the voltages of the outputs. The control circuit may implement a first control loop that maintains a common mode voltage of the pair of outputs at a predetermined voltage independent of the individual voltages of the pair of outputs.
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公开(公告)号：US20220231775A1
公开(公告)日：2022-07-21
申请号：US17150170
申请日：2021-01-15
Inventor： Anthony Louviere , John L. Melanson , Gabriel Vogel
Abstract: Calibration of devices communicating on a shared data bus may improve data integrity on the shared data bus by reducing duty cycle distortion. Duty cycle distortion may be reduced by adjusting timing of a transceiver in a device for communicating on the shared data bus using calibration codes. The calibration codes may be loaded into memory and used to reconfigure the transceiver timing on the shared data bus with reconfiguration occurring within one or more unit-intervals of time. The calibration code may be used, for example, to adjust a PMOS or NMOS trim circuit at the transceiver.
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公开(公告)号：US20220221505A1
公开(公告)日：2022-07-14
申请号：US17148371
申请日：2021-01-13
Inventor： Aleksey S. Khenkin , John C. Tucker , John L. Melanson , Jeffrey A. Weintraub
Abstract: A method for screening a semiconductor device for production of excessive random telegraph sequence (RTS) noise includes measuring noise of the semiconductor device at a first temperature, changing the temperature of the semiconductor device to a second temperature different from the first temperature, measuring noise of the semiconductor device at the second temperature, extracting a characteristic of the measured noise at the first and second temperatures (e.g., standard deviation, HMM output, frequency domain spectrum of time domain noise measurement), making a comparison of the extracted first and second noise characteristics, and making a determination whether the semiconductor device produces excessive RTS noise based on whether the comparison is above a predetermined threshold. Two different bias conditions of the device may be employed rather than, or in addition to, the two different temperatures.
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公开(公告)号：US11296598B1
公开(公告)日：2022-04-05
申请号：US17192990
申请日：2021-03-05
Inventor： Eric J. King , Axel Thomsen , Anthony S. Doy , Thomas H. Hoff , John L. Melanson
Abstract: Driver circuitry for driving a load based on an input signal, comprising: at least one variable boost stage comprising: first and second input nodes configured to receive a first voltage and a second voltage respectively; first and second flying capacitor nodes for connection to a flying capacitor therebetween; a network of switching paths for selectively connecting the first and second input nodes with the first and second flying capacitor nodes; an output stage for selectively connecting a driver output node to each of the first and second flying capacitor nodes; and a controller operable in a first boost mode to: control the output stage to selectively connect the driver output node to the first flying capacitor node; control the network of switching paths to switch connection of the second flying capacitor node between the first and second input nodes at a controlled duty cycle; and in a first charge top-up cycle, control the network of switching paths to connect the first input node to the first flying capacitor node during a phase of the controlled duty cycle in which the first input node is connected to the second flying capacitor node; wherein the frequency of the controlled duty cycle is a greater than the frequency of the charge top-up cycle.
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