公开(公告)号：US09178625B1

公开(公告)日：2015-11-03

申请号：US14095789

申请日：2013-12-03

Applicant: ClariPhy Communications, Inc.

Inventor： Mario Rafael Hueda ,  Mauro M. Bruni ,  Federico Nicolas Paredes ,  Hugo Santiago Carrer ,  Diego Ernesto Crivelli ,  Oscar Ernesto Agazzi ,  Norman L. Swenson ,  Seyedmohammadreza Motaghiannezam

IPC: H04B10/00 ,  H04B10/61

CPC classification number: H04B10/6162 ,  H04B10/616 ,  H04B10/6165 ,  H04L7/0075 ,  H04L7/0079

Abstract: A timing recovery system generates a sampling clock to synchronize sampling of a receiver to a symbol rate of an incoming signal. The input signal is received over an optical communication channel. The receiver generates a timing matrix representing coefficients of a timing tone detected in the input signal. The timing tone representing frequency and phase of a symbol clock of the input signal and has a non-zero timing tone energy. The receiver computes a rotation control signal based on the timing matrix that represents an amount of accumulated phase shift in the input signal relative to the sampling clock. A numerically controlled oscillator is controlled to adjust at least one of the phase and frequency of the sampling clock based on the rotation control signal.

Abstract translation: 定时恢复系统产生采样时钟以使接收机的采样与输入信号的符号速率同步。 输入信号通过光通信信道接收。 接收器产生表示在输入信号中检测到的定时音的系数的定时矩阵。 定时音表示输入信号的符号时钟的频率和相位，并具有非零定时音能量。 接收机基于表示输入信号相对于采样时钟的累积相移量的定时矩阵来计算旋转控制信号。 受控的数控振荡器基于旋转控制信号来调节采样时钟的相位和频率中的至少一个。

公开(公告)号：US09337934B1

公开(公告)日：2016-05-10

申请号：US14093306

申请日：2013-11-29

Applicant: ClariPhy Communications, Inc.

Inventor： Oscar Ernesto Agazzi ,  Diego Ernesto Crivelli ,  Paul Voois ,  Ramiro Rogelio Lopez ,  Jorge Manuel Finochietto ,  Norman L. Swenson ,  Mario Rafael Hueda ,  Hugo Santiago Carrer ,  Vadim Gutnik ,  Ulises Morales ,  Martin Ignacio del Barco ,  Martin Carlos Asinari ,  Federico Nicolas Paredes ,  Alfredo Javier Taddei ,  Mauro M. Bruni ,  Damian Alfonso Morero ,  Facundo Abel Alcides Ramos ,  Laura Maria Ferster ,  Elvio Adrian Serrano ,  Pablo Gustavo Quiroga ,  Roman Antonio Arenas ,  Matias German Schnidrig ,  Alejandro Javier Schwoykoski

IPC: H04B10/00 ,  H04B10/40

CPC classification number: H04B10/516 ,  H04B10/40 ,  H04B10/61 ,  H04L7/0075

Abstract: A coherent receiver comprises an ingress signal path having an ingress line-side interface, and an ingress host-side interface. The ingress signal path is configured to receive an analog signal vector at the ingress line-side interface, to demodulate the analog signal vector, and to output a digital data signal at the ingress host-side interface. The coherent receiver also comprises clock and timing circuitry configured to receive a single reference clock signal and to provide a plurality of modified ingress path clock signals to different components of the ingress signal path, the plurality of modified ingress path clock signals derived from the single reference clock signal and the plurality of modified ingress path clock signals having different clock rates. The receiver, transmitter, or transceiver can operate in a plurality of programmable operating modes to accommodate different modulation/de-modulation schemes, error correction code schemes, framing/mapping protocols, or other programmable features.

Abstract translation: 相干接收机包括具有入口线路侧接口和入口主机侧接口的入口信号路径。 入口信号路径被配置为在入口侧接口处接收模拟信号向量，以解调模拟信号向量，并在入口主机侧接口输出数字数据信号。 相干接收机还包括被配置为接收单个参考时钟信号并且向入口信号路径的不同分量提供多个经修改的入口路径时钟信号的时钟和定时电路，所述多个修改的入口路径时钟信号从单个参考 时钟信号和具有不同时钟速率的多个修改的入口路径时钟信号。 接收器，发射器或收发器可以以多种可编程操作模式操作，以适应不同的调制/解调方案，纠错码方案，成帧/映射协议或其他可编程特征。