公开(公告)号：US10362568B2

公开(公告)日：2019-07-23

申请号：US15521581

申请日：2015-10-29

Applicant: CommScope Technologies LLC

Inventor： Zhen Guo ,  Zhao Li ,  Roger Doles, Jr.

IPC: H04W72/04 ,  H04B7/155 ,  H04B1/00 ,  H04B7/04 ,  H04W84/04 ,  H04W88/08

Abstract: Certain features relate to optimizing the processing of downlink data in a telecommunications system by capturing a downlink data stream and transferring the downlink data to a memory device in parallel. A processing device can capture a first set of downlink data blocks from a base station and store the first set of downlink data blocks to a memory device. Once a sufficient number of downlink data blocks are written to the memory device, the first set of data blocks can be transferred to a digital signal processor. A second set of data blocks can be captured substantially simultaneous to the first set of data blocks being transferred to the digital signal processor. In additional aspects, the second set of data blocks can be processed by the digital signal processor substantially simultaneous to additional data blocks being captured and stored in the memory device.