公开(公告)号：US20020149461A1

公开(公告)日：2002-10-17

申请号：US10167944

申请日：2002-06-11

Applicant: Compaq Computer Corporation

Inventor： Raoji A. Patel ,  James E. Drew ,  Raymond A. Pelletier ,  Brian R. McQuain

IPC: H01F005/00

CPC classification number: H01F27/2804 ,  H01F41/041 ,  H01F2019/085 ,  H05K1/165 ,  Y10T29/4902

Abstract: A method and apparatus to layout planar magnetic coils on a PCB consists of maximizing the layer to layer overlap, and consequently maximizing total inductance for the given layout area, by spiraling alternating layers inward and outward. A further benefit of the matching opposite spirals is the ability to make the layer to layer electrical contacts within the magnetic field area, thus reducing leakage inductance, and minimizing the wasted extra conductor line length needed to make the connections outside the magnetic field. The reduced conductor line length results in reduced conductor line resistance. The method is applicable to voltage transformers and isolation transformers as well as simple inductors and other magnetic devices. In the transformer case the odd numbered layers are typically connected together in series to provide a larger turn ratio, and the even numbered layers are typically single turns (i.e., no spiral) connected together in parallel to provide more current capability.