HIGH-DENSITY ARRAY CHIPS WITH SYNCHRONOUS TRACKS
    1.
    发明申请
    HIGH-DENSITY ARRAY CHIPS WITH SYNCHRONOUS TRACKS 有权
    高密度阵列与同步轨迹

    公开(公告)号:US20140085457A1

    公开(公告)日:2014-03-27

    申请号:US14090529

    申请日:2013-11-26

    CPC classification number: G01N21/01 G01N21/6456 H04N7/18

    Abstract: An array chip design is provided where the chip includes a field region arranged with sites according to a first pitch and at least one track region having a one-dimensional site pattern arranged according to a second pitch that is less dense and is an integer multiple of the first pitch so that observation through pixel-based sensors using one-dimensional quad-cell averaging can be applied in the track region, thereby to attain alignment of the chip to pixel-based optical instrumentation with a higher density of sites.

    Abstract translation: 提供了一种阵列芯片设计,其中芯片包括具有根据第一间距设置的位置的场区域和至少一个具有根据第二间距排列的一维位置图案的轨道区域,所述第二间距不太密集,并且是至少一个 第一音调,使得通过使用一维四单元平均的基于像素的传感器的观察可以应用于轨道区域,从而实现基片与基于像素的光学仪器与较高密度位置的对准。

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