公开(公告)号：US09236127B2

公开(公告)日：2016-01-12

申请号：US14503709

申请日：2014-10-01

Applicant: Conversant IP Management Inc.

Inventor： Hyoung Seub Rhie

IPC: G11C16/04 ,  H01L27/115 ,  H01L29/66

CPC classification number: G11C16/0483 ,  G11C16/0466 ,  H01L27/11578 ,  H01L29/66833

Abstract: A non-volatile memory device, including: a substrate; a plurality of string stacks disposed over the substrate, each string stack including a long axis and a short axis in a plane parallel to the substrate, the long axis extending along a y-direction and the short axis extending along an x-direction, each string stack including a plurality of strings being stacked in a direction vertical to the substrate and having a first end and a second end at different locations in the y-direction, the plurality of string stacks including a first and a second set of string stacks, at least some of the string stacks of the first set of string stacks being offset along the x-direction from at least some of the string stacks of the second set of string stacks.

Abstract translation: 一种非易失性存储器件，包括：衬底; 多个串组，其布置在所述衬底上，每个串组包括在平行于所述衬底的平面中的长轴和短轴，所述长轴沿y方向延伸，所述短轴沿x方向延伸，每个 所述串叠包括多个串，所述多个串在与所述基板垂直的方向上堆叠并且具有在所述y方向上的不同位置处的第一端和第二端，所述多个串堆叠包括第一和第二组串组， 第一组字符串堆栈的至少一些字符串堆栈沿着x方向从第二组字符串堆栈的至少一些字符串堆栈偏移。

公开(公告)号：US09343152B2

公开(公告)日：2016-05-17

申请号：US14460963

申请日：2014-08-15

Applicant: Conversant IP Management Inc.

Inventor： Hyoung Seub Rhie

IPC: G11C16/04 ,  H01L27/115

CPC classification number: G11C16/0483 ,  G11C16/0416 ,  H01L27/1157 ,  H01L27/11578

Abstract: A three-dimensional integrated circuit non-volatile memory array includes a memory array with first and second NAND memory cell string stacks having opposite orientations, where each NAND memory cell string includes a plurality of transistors and a source line contact connected in series between a bit line and string extension region which extends from the source line contact and past a first self-aligned SSL gate electrode located on a peripheral end of the NAND memory cell string, and also includes a string select transistor formed with a second self-aligned SSL connected in series between the bit line and the plurality of transistors, where the first and second self-aligned SSL gate electrodes are shared between adjacent NAND memory cell strings having opposite orientations.

Abstract translation: 三维集成电路非易失性存储器阵列包括具有相反取向的第一和第二NAND存储器单元串组的存储器阵列，其中每个NAND存储器单元串包括多个晶体管，以及串联连接在一位 线和串延伸区域，其从源极线接触延伸并且经过位于NAND存储器单元串的外围端上的第一自对准SSL栅电极，并且还包括形成有第二自对准SSL连接的串选择晶体管 串联在位线和多个晶体管之间，其中第一和第二自对准SSL栅电极在具有相反取向的相邻NAND存储器单元串之间共享。

公开(公告)号：US20150103600A1

公开(公告)日：2015-04-16

申请号：US14503709

申请日：2014-10-01

Applicant: Conversant IP Management Inc.

Inventor： Hyoung Seub Rhie

IPC: G11C16/04 ,  H01L27/115

CPC classification number: G11C16/0483 ,  G11C16/0466 ,  H01L27/11578 ,  H01L29/66833

Abstract: A non-volatile memory device, comprising: a substrate; a plurality of string stacks disposed over the substrate, each string stack comprising a long axis and a short axis in a plane parallel to the substrate, the long axis extending along a y-direction and the short axis extending along an x-direction, each string stack comprising a plurality of strings being stacked in a direction vertical to the substrate and having a first end and a second end at different locations in the y-direction, the plurality of string stacks comprising a first and a second set of string stacks, at least some of the string stacks of the first set of string stacks being offset along the x-direction from at least some of the string stacks of the second set of string stacks.

Abstract translation: 一种非易失性存储器件，包括：衬底; 多个串组，其布置在所述衬底上，每个串组包括在与所述衬底平行的平面中的长轴和短轴，所述长轴沿y方向延伸，所述短轴沿x方向延伸，每个 串组合包括多个串沿垂直于基板的方向堆叠并且具有在y方向的不同位置处的第一端和第二端，所述多个串组包括第一和第二组串组， 第一组字符串堆栈的至少一些字符串堆栈沿着x方向从第二组字符串堆栈的至少一些字符串堆栈偏移。

公开(公告)号：US20150098274A1

公开(公告)日：2015-04-09

申请号：US14460963

申请日：2014-08-15

Applicant: CONVERSANT IP MANAGEMENT INC.

Inventor： Hyoung Seub Rhie

IPC: G11C16/04 ,  H01L29/788 ,  H01L27/115

CPC classification number: G11C16/0483 ,  G11C16/0416 ,  H01L27/1157 ,  H01L27/11578

Abstract: A three-dimensional integrated circuit non-volatile memory array includes a memory array with first and second NAND memory cell string stacks having opposite orientations, where each NAND memory cell string includes a plurality of transistors and a source line contact connected in series between a bit line and string extension region which extends from the source line contact and past a first self-aligned SSL gate electrode located on a peripheral end of the NAND memory cell string, and also includes a string select transistor formed with a second self-aligned SSL connected in series between the bit line and the plurality of transistors, where the first and second self-aligned SSL gate electrodes are shared between adjacent NAND memory cell strings having opposite orientations.

Abstract translation: 三维集成电路非易失性存储器阵列包括具有相反取向的第一和第二NAND存储器单元串组的存储器阵列，其中每个NAND存储器单元串包括多个晶体管，以及串联连接在一位 线和串延伸区域，其从源极线接触延伸并且经过位于NAND存储器单元串的外围端上的第一自对准SSL栅电极，并且还包括形成有第二自对准SSL连接的串选择晶体管 串联在位线和多个晶体管之间，其中第一和第二自对准SSL栅电极在具有相反取向的相邻NAND存储器单元串之间共享。