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公开(公告)号:USRE48410E1
公开(公告)日:2021-01-26
申请号:US14209455
申请日:2014-03-13
Inventor: Randy J. Caplan , Steven J. Schwake
Abstract: A leakage manager system for adequately minimizing static leakage of an integrated circuit is disclosed. The leakage manager system includes a generator configured to generate a control signal to be applied to a sleep transistor. A monitor is configured to determine whether to adjust the control signal to adequately minimize the static leakage. In some embodiments, the monitor includes an emulated sleep transistor. A regulator is configured to adjust the control signal depending on the determination.