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公开(公告)号：US11023821B2
公开(公告)日：2021-06-01
申请号：US15881260
申请日：2018-01-26
Applicant: D-WAVE SYSTEMS INC.
Inventor： Richard G. Harris , Kelly T. R. Boothby , Andrew D. King
Abstract: A system and method of operation embeds a three-dimensional structure in a topology of an analog processor, for example a quantum processor. The analog processor may include a plurality of qubits arranged in tiles or cells. A number of qubits and communicatively coupled as logical qubits, each logical qubit which span across a plurality of tiles or cells of the qubits. Communicatively coupling between qubits of any given logical qubit can be implemented via application or assignment of a first ferromagnetic coupling strength to each of a number of couplers that communicatively couple the respective qubits in the logical qubit. Other ferromagnetic coupling strengths can be applied or assigned to couplers that communicatively couple qubits that are not part of the logical qubit. The first ferromagnetic coupling strength may be substantially higher than the other ferromagnetic coupling strengths.
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公开(公告)号：US11663512B2
公开(公告)日：2023-05-30
申请号：US17584600
申请日：2022-01-26
Applicant: D-WAVE SYSTEMS INC.
Inventor： Steven P. Reinhardt , Andrew D. King , Loren J. Swenson , Warren T. E. Wilkinson , Trevor Michael Lanting
IPC: G06N10/00 , G05B19/042
CPC classification number: G06N10/00 , G05B19/042 , G05B2219/25071
Abstract: Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.
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公开(公告)号：US20200372393A1
公开(公告)日：2020-11-26
申请号：US16988232
申请日：2020-08-07
Applicant: D-WAVE SYSTEMS INC.
Inventor： Robert B. Israel , Trevor M. Lanting , Andrew D. King
Abstract: Generate an automorphism of the problem graph, determine an embedding of the automorphism to the hardware graph and modify the embedding of the problem graph into the hardware graph to correspond to the embedding of the automorphism to the hardware graph. Determine an upper-bound on the required chain strength. Calibrate and record properties of the component of a quantum processor with a digital processor, query the digital processor for a range of properties. Generate a bit mask and change the sign of the bias of individual qubits according to the bit mask before submitting a problem to a quantum processor, apply the same bit mask to the bit result. Generate a second set of parameters of a quantum processor from a first set of parameters via a genetic algorithm.
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4.发明申请公开(公告)号：US20190266508A1
公开(公告)日：2019-08-29
申请号：US16275816
申请日：2019-02-14
Applicant: D-WAVE SYSTEMS INC.
Inventor： Paul I. Bunyk , James King , Murray C. Thom , Mohammad H. Amin , Anatoly Yu Smirnov , Sheir Yarkoni , Trevor M. Lanting , Andrew D. King , Kelly T. R. Boothby
Abstract: The systems, devices, articles, and methods described herein generally relate to analog computers, for example quantum processors comprising qubits, couplers, and, or cavities. Analog computers, for example quantum processor based computers, are the subject of various sources of error which can hinder operation, potentially reducing computational accuracy and speed. Sources of error can be broadly characterized, for example as i) a background susceptibility do to inherently characteristics of the circuitry design, ii) as an h/J ratio imbalance, iii) bit flip errors, iv) fidelity, and v) Anderson localization, and various combinations of the aforesaid.
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公开(公告)号：US12248849B2
公开(公告)日：2025-03-11
申请号：US18444208
申请日：2024-02-16
Applicant: D-WAVE SYSTEMS INC.
Inventor： Steven P. Reinhardt , Andrew D. King , Loren J. Swenson , Warren T. E. Wilkinson , Trevor Michael Lanting
IPC: G06N10/00 , G05B19/042
Abstract: Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.
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Patent Agency Ranking
公开(公告)号：US20250013900A1
公开(公告)日：2025-01-09
申请号：US18444208
申请日：2024-02-16
Applicant: D-WAVE SYSTEMS INC.
Inventor： Steven P. Reinhardt , Andrew D. King , Loren J. Swenson , Warren T.E. Wilkinson , Trevor Michael Lanting
IPC: G06N10/00 , G05B19/042
Abstract: Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.
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公开(公告)号：US20240169227A1
公开(公告)日：2024-05-23
申请号：US18536897
申请日：2023-12-12
Applicant: D-WAVE SYSTEMS INC.
Inventor： Robert B. Israel , Trevor M. Lanting , Andrew D. King
Abstract: Generate an automorphism of the problem graph, determine an embedding of the automorphism to the hardware graph and modify the embedding of the problem graph into the hardware graph to correspond to the embedding of the automorphism to the hardware graph. Determine an upper-bound on the required chain strength. Calibrate and record properties of the component of a quantum processor with a digital processor, query the digital processor for a range of properties. Generate a bit mask and change the sign of the bias of individual qubits according to the bit mask before submitting a problem to a quantum processor, apply the same bit mask to the bit result. Generate a second set of parameters of a quantum processor from a first set of parameters via a genetic algorithm.
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8.发明授权公开(公告)号：US11797874B2
公开(公告)日：2023-10-24
申请号：US17387654
申请日：2021-07-28
Applicant: D-WAVE SYSTEMS INC.
Inventor： Paul I. Bunyk , James King , Murray C. Thom , Mohammad H. Amin , Anatoly Smirnov , Sheir Yarkoni , Trevor M. Lanting , Andrew D. King , Kelly T. R. Boothby
CPC classification number: G06N10/00 , G06F11/0736 , G06F11/0751 , G06F11/0793
Abstract: The systems, devices, articles, and methods described herein generally relate to analog computers, for example quantum processors comprising qubits, couplers, and, or cavities. Analog computers, for example quantum processor based computers, are the subject of various sources of error which can hinder operation, potentially reducing computational accuracy and speed. Sources of error can be broadly characterized, for example as i) a background susceptibility do to inherently characteristics of the circuitry design, ii) as an h/J ratio imbalance, iii) bit flip errors, iv) fidelity, and v) Anderson localization, and various combinations of the aforesaid.
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公开(公告)号：US20230325695A1
公开(公告)日：2023-10-12
申请号：US18137271
申请日：2023-04-20
Applicant: D-WAVE SYSTEMS INC.
Inventor： Steven P. Reinhardt , Andrew D. King , Loren J. Swenson , Warren T.E. Wilkinson , Trevor Michael Lanting
IPC: G06N10/00 , G05B19/042
CPC classification number: G06N10/00 , G05B19/042 , G05B2219/25071
Abstract: Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.
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公开(公告)号：US20200293331A1
公开(公告)日：2020-09-17
申请号：US16817210
申请日：2020-03-12
Applicant: D-WAVE SYSTEMS INC.
Inventor： William W. Bernoudy , James A. King , Andrew D. King
Abstract: A highly parallelized parallel tempering technique for simulating dynamic systems, such as quantum processors, is provided. Replica exchange is facilitated by synchronizing grid-level memory. Particular implementations for simulating quantum processors by representing cells of qubits and couplers in grid-, block-, and thread-level memory are discussed. Parallel tempering of such dynamic systems can be assisted by modifying replicas based on isoenergetic cluster moves (ICMs). ICMs are generated via secondary replicas which are maintained alongside primary replicas and exchanged between blocks and/or generated dynamically by blocks without necessarily being exchanged. Certain refinements, such as exchanging energies and temperatures through grid-level memory, are also discussed.
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