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公开(公告)号：US11163980B2
公开(公告)日：2021-11-02
申请号：US16305909
申请日：2017-05-22
Applicant: DENSO CORPORATION
Inventor： Mitsuru Ambai , Yutaka Munaoka , Takuhiro Omi
Abstract: A feature point position estimation device is provided. The feature point position estimation device includes a subject detection section for detecting a subject region from a subject image, a feature point positioning section for positioning a feature point at a preliminarily prepared initial feature point position with respect to the subject region, a feature amount acquisition unit for acquiring a feature amount of the feature points arranged, a regression calculation unit for calculating a deviation amount of a position of a true feature point with respect to the position of the feature point by performing a regression calculation on the feature amount, and a repositioning unit for repositioning the feature points based on the deviation amount. The regression calculation unit calculates the deviation amount by converting the feature amount in a matrix-resolved regression matrix.
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2.发明申请RELATEDNESS DETERMINATION DEVICE, NON-TRANSITORY TANGIBLE COMPUTER-READABLE MEDIUM FOR THE SAME, AND RELATEDNESS DETERMINATION METHOD 审中-公开相关性确定设备，非可交换的可计算机可读介质及相关性确定方法公开(公告)号：US20150278156A1
公开(公告)日：2015-10-01
申请号：US14432592
申请日：2013-11-01
Applicant: DENSO CORPORATION
Inventor： Mitsuru Ambai , Mikio Shimizu
CPC classification number: G06F17/16 , G06F17/10 , G06K9/6267 , G06N20/00
Abstract: A relatedness determination device includes: a feature vector acquisition portion that acquires a binarized feature vector; a basis vector acquisition portion that acquires a plurality of basis vectors obtained by decomposing a real vector into a linear sum of the basis vectors, which have a plurality of elements including only binary or ternary discrete values; and a vector operation portion that sequentially performs inner product calculation between the binarized feature vector and each of the basis vectors to determine relatedness between the real vector and the binarized feature vector.
Abstract translation: 相关性确定装置包括：获取二值化特征向量的特征向量获取部分; 基本向量获取部，其获取通过将实数矢量分解为具有仅包含二进制或三元离散值的多个元素的基矢量的线性和而获得的多个基矢量; 以及矢量操作部分，其顺序地执行二值化特征向量与每个基本向量之间的内积计算，以确定实数向量和二值化特征向量之间的相关性。
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公开(公告)号：US10409886B2
公开(公告)日：2019-09-10
申请号：US14432592
申请日：2013-11-01
Applicant: DENSO CORPORATION
Inventor： Mitsuru Ambai , Mikio Shimizu
Abstract: A relatedness determination device includes: a feature vector acquisition portion that acquires a binarized feature vector; a basis vector acquisition portion that acquires a plurality of basis vectors obtained by decomposing a real vector into a linear sum of the basis vectors, which have a plurality of elements including only binary or ternary discrete values; and a vector operation portion that sequentially performs inner product calculation between the binarized feature vector and each of the basis vectors to determine relatedness between the real vector and the binarized feature vector.
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4.发明申请FEATURE AMOUNT CONVERSION APPARATUS, LEARNING APPARATUS, RECOGNITION APPARATUS, AND FEATURE AMOUNT CONVERSION PROGRAM PRODUCT 审中-公开特征量转换装置，学习装置，识别装置和特征量转换程序产品公开(公告)号：US20160125271A1
公开(公告)日：2016-05-05
申请号：US14895198
申请日：2014-05-28
Applicant: DENSO CORPORATION
Inventor： Mitsuru Ambai , Mikio Shimizu
CPC classification number: G06K9/6262 , G06K9/4642 , G06K9/52 , G06K9/6232 , G06T7/60 , G06T2200/28 , G06T2207/20081 , H03M7/14
Abstract: A feature amount conversion apparatus includes a plurality of bit rearrangement units, a plurality of logical operation units, and a feature integration unit. The bit rearrangement units generate rearranged bit strings by rearranging elements of an inputted binary feature vector into diverse arrangements. The logical operation units generate logically-operated bit strings by performing a logical operation on the inputted feature vector and each of the rearranged bit strings. The feature integration unit generates a nonlinearly converted feature vector by integrating the generated logically-operated bit strings.
Abstract translation: 特征量转换装置包括多个比特重排单元，多个逻辑运算单元和特征集成单元。 比特重排单元通过将输入的二进制特征向量的元素重新排列成不同的布置来产生重新排列的比特串。 逻辑运算单元通过对输入的特征向量和每个重新布置的位串执行逻辑运算来产生逻辑运算位串。 特征集成单元通过对生成的逻辑运算位串进行积分来生成非线性转换的特征向量。
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