公开(公告)号：US20250062751A1

公开(公告)日：2025-02-20

申请号：US18802646

申请日：2024-08-13

Applicant: DOLPHIN DESIGN

Inventor： Frédéric POULLET ,  Ayoub BOUNDOUQ

IPC: H03K3/03 ,  H03K5/133 ,  H03K19/173

Abstract: The present disclosure relates to a clock generator comprising: a ring oscillator configured to generate an output frequency signal; a frequency detector configured to compare a frequency of the output frequency signal with r times a frequency of a reference frequency signal and to generate a feedback signal; and a control circuit configured to: control a loop delay parameter of the ring oscillator and a supply voltage of the ring oscillator based on the feedback signal; reduce the frequency of the output frequency signal when its frequency is higher than r times the frequency of the reference frequency signal by reducing the supply voltage; and increase the frequency of the output frequency signal when its frequency is lower than r times the frequency of the reference frequency signal by reducing the loop delay parameter.