SEMICONDUCTOR TEST INTERFACE
    1.
    发明申请
    SEMICONDUCTOR TEST INTERFACE 有权
    半导体测试界面

    公开(公告)号:US20060279305A1

    公开(公告)日:2006-12-14

    申请号:US11275768

    申请日:2006-01-27

    IPC分类号: G01R31/02

    CPC分类号: G01R31/2889

    摘要: The present invention relates to a semiconductor test interface for interfacing a DUT (Device Under Test) to a pin card using a cable comprising a DUT board including one or more first connectors for electrically connecting one or more test sockets for mounting the DUT to the one or more cables, and a circuit wiring for electrically connecting the one or more test sockets to the one or more first connectors; and the one more cable including a second connector for an electrical connection to the one or more first connectors, and a third connector for an electrical connection to the pin card, wherein the one or more first connectors correspond to the one or more cables by 1:1. In accordance with the present invention, the manufacturing cost is reduced by simplifying the manufacturing process and the semiconductor test interface may easily correspond to the test of the different DUTs.

    摘要翻译: 本发明涉及一种半导体测试接口,用于使用包括DUT板的电缆将DUT(被测设备)连接到针卡,该电缆包括一个或多个第一连接器,用于将一个或多个测试插座电连接以将DUT安装到一个 或更多的电缆,以及用于将所述一个或多个测试插座电连接到所述一个或多个第一连接器的电路布线; 并且所述另一个电缆包括用于与所述一个或多个第一连接器的电连接的第二连接器和用于与所述销卡的电连接的第三连接器,其中所述一个或多个第一连接器对应于所述一个或多个电缆1 :1。 根据本发明,通过简化制造过程来降低制造成本,并且半导体测试接口可以容易地对应于不同DUT的测试。