INPUT STAGE FOR AN AMPLIFIER
    1.
    发明申请
    INPUT STAGE FOR AN AMPLIFIER 有权
    输入级放大器

    公开(公告)号:US20100120391A1

    公开(公告)日:2010-05-13

    申请号:US12692730

    申请日:2010-01-25

    IPC分类号: H04B1/16 H03F3/16 H02H9/00

    CPC分类号: H04B1/18 H03F3/45183

    摘要: In one embodiment, the present invention includes an amplifier having an input to receive a radio frequency (RF) signal from an output node of a source. An input stage coupled to the amplifier input may include one or more components to aid in processing of incoming signals. One such component coupled between the source and the input of the amplifier is a coupling capacitor used to maintain a bias voltage of the amplifier at a different potential than a DC voltage of the output node. In certain applications, the amplifier and the coupling capacitor may be integrated on a single substrate.

    摘要翻译: 在一个实施例中,本发明包括具有用于从源的输出节点接收射频(RF)信号的输入的放大器。 耦合到放大器输入的输入级可以包括一个或多个组件以帮助处理输入信号。 耦合在放大器的源极和输入之间的一个这样的部件是用于将放大器的偏置电压保持在与输出节点的直流电压不同的电位的耦合电容器。 在某些应用中,放大器和耦合电容器可以集成在单个衬底上。

    Low noise amplifier for a radio receiver
    2.
    发明授权
    Low noise amplifier for a radio receiver 有权
    用于无线电接收机的低噪声放大器

    公开(公告)号:US08346198B2

    公开(公告)日:2013-01-01

    申请号:US11171817

    申请日:2005-06-30

    IPC分类号: H04B1/18

    摘要: In one embodiment, the present invention includes an amplifier having a transistor stage coupled between a supply voltage and a bias current. The transistor stage has an input to receive a radio frequency (RF) input signal obtained from an antenna. The amplifier has an input impedance that is unmatched to a source impedance of the antenna. In some embodiments, this unmatched input impedance may be substantially greater than the source impedance, and may further be controlled based on a strength of the RF input signal.

    摘要翻译: 在一个实施例中,本发明包括具有耦合在电源电压和偏置电流之间的晶体管级的放大器。 晶体管级具有用于接收从天线获得的射频(RF)输入信号的输入。 放大器具有与天线的源阻抗无法匹配的输入阻抗。 在一些实施例中,这种不匹配的输入阻抗可以基本上大于源阻抗,并且还可以基于RF输入信号的强度进行控制。

    Input stage for an amplifier
    3.
    发明授权
    Input stage for an amplifier 有权
    放大器的输入级

    公开(公告)号:US07667542B2

    公开(公告)日:2010-02-23

    申请号:US12069604

    申请日:2008-02-12

    IPC分类号: H03G3/10 H03F3/00

    CPC分类号: H04B1/18 H03F3/45183

    摘要: In one embodiment, the present invention includes an amplifier having an input to receive a radio frequency (RF) signal from an output node of a source. An input stage coupled to the amplifier input may include one or more components to aid in processing of incoming signals. One such component coupled between the source and the input of the amplifier is a coupling capacitor used to maintain a bias voltage of the amplifier at a different potential than a DC voltage of the output node. In certain applications, the amplifier and the coupling capacitor may be integrated on a single substrate.

    摘要翻译: 在一个实施例中,本发明包括具有用于从源的输出节点接收射频(RF)信号的输入的放大器。 耦合到放大器输入的输入级可以包括一个或多个组件以帮助处理输入信号。 耦合在放大器的源极和输入之间的一个这样的部件是用于将放大器的偏置电压保持在与输出节点的直流电压不同的电位的耦合电容器。 在某些应用中,放大器和耦合电容器可以集成在单个衬底上。

    Input stage for an amplifier
    4.
    发明授权

    公开(公告)号:US07355476B2

    公开(公告)日:2008-04-08

    申请号:US11171042

    申请日:2005-06-30

    IPC分类号: H03G3/10

    CPC分类号: H04B1/18 H03F3/45183

    摘要: In one embodiment, the present invention includes an amplifier having an input to receive a radio frequency (RF) signal from an output node of a source. An input stage coupled to the amplifier input may include one or more components to aid in processing of incoming signals. One such component coupled between the source and the input of the amplifier is a coupling capacitor used to maintain a bias voltage of the amplifier at a different potential than a DC voltage of the output node. In certain applications, the amplifier and the coupling capacitor may be integrated on a single substrate.

    Input stage for an amplifier
    5.
    发明授权
    Input stage for an amplifier 有权
    放大器的输入级

    公开(公告)号:US08203385B2

    公开(公告)日:2012-06-19

    申请号:US12692730

    申请日:2010-01-25

    IPC分类号: H03G3/10 H03F3/00

    CPC分类号: H04B1/18 H03F3/45183

    摘要: In one embodiment, the present invention includes an amplifier having an input to receive a radio frequency (RF) signal from an output node of a source. An input stage coupled to the amplifier input may include one or more components to aid in processing of incoming signals. One such component coupled between the source and the input of the amplifier is a coupling capacitor used to maintain a bias voltage of the amplifier at a different potential than a DC voltage of the output node. In certain applications, the amplifier and the coupling capacitor may be integrated on a single substrate.

    摘要翻译: 在一个实施例中,本发明包括具有用于从源的输出节点接收射频(RF)信号的输入的放大器。 耦合到放大器输入的输入级可以包括一个或多个组件以帮助处理输入信号。 耦合在放大器的源极和输入之间的一个这样的部件是用于将放大器的偏置电压保持在与输出节点的直流电压不同的电位的耦合电容器。 在某些应用中,放大器和耦合电容器可以集成在单个衬底上。

    Input stage for an amplifier
    6.
    发明申请
    Input stage for an amplifier 有权
    放大器的输入级

    公开(公告)号:US20080204144A1

    公开(公告)日:2008-08-28

    申请号:US12069604

    申请日:2008-02-12

    IPC分类号: H03G3/10 H03G3/00

    CPC分类号: H04B1/18 H03F3/45183

    摘要: In one embodiment, the present invention includes an amplifier having an input to receive a radio frequency (RF) signal from an output node of a source. An input stage coupled to the amplifier input may include one or more components to aid in processing of incoming signals. One such component coupled between the source and the input of the amplifier is a coupling capacitor used to maintain a bias voltage of the amplifier at a different potential than a DC voltage of the output node. In certain applications, the amplifier and the coupling capacitor may be integrated on a single substrate.

    摘要翻译: 在一个实施例中,本发明包括具有用于从源的输出节点接收射频(RF)信号的输入的放大器。 耦合到放大器输入的输入级可以包括一个或多个组件以帮助处理输入信号。 耦合在放大器的源极和输入之间的一个这样的部件是用于将放大器的偏置电压保持在与输出节点的直流电压不同的电位的耦合电容器。 在某些应用中,放大器和耦合电容器可以集成在单个衬底上。

    Digital Architecture Using One-Time Programmable (OTP) Memory
    7.
    发明申请
    Digital Architecture Using One-Time Programmable (OTP) Memory 有权
    使用一次性可编程(OTP)存储器的数字架构

    公开(公告)号:US20100009640A1

    公开(公告)日:2010-01-14

    申请号:US12562357

    申请日:2009-09-18

    CPC分类号: G06F8/60

    摘要: In one aspect, the present invention includes an apparatus having a digital signal processor (DSP), a controller coupled to the DSP to provide control signals to the DSP, and a one-time programmable (OTP) memory coupled to the DSP and the controller. The OTP memory may include multiple code portions including a first code block to control the DSP and a second code block to control the controller.

    摘要翻译: 一方面,本发明包括具有数字信号处理器(DSP)的装置,耦合到DSP以向DSP提供控制信号的控制器以及耦合到DSP和控制器的一次可编程(OTP)存储器 。 OTP存储器可以包括多个代码部分,包括用于控制DSP的第一代码块和用于控制控制器的第二代码块。

    Digital architecture using one-time programmable (OTP) memory
    8.
    发明授权
    Digital architecture using one-time programmable (OTP) memory 失效
    数字架构采用一次性可编程(OTP)存储器

    公开(公告)号:US07613913B2

    公开(公告)日:2009-11-03

    申请号:US11385520

    申请日:2006-03-21

    IPC分类号: G06F9/24

    CPC分类号: G06F8/60

    摘要: In one aspect, the present invention includes an apparatus having a digital signal processor (DSP), a controller coupled to the DSP to provide control signals to the DSP, and a one-time programmable (OTP) memory coupled to the DSP and the controller. The OTP memory may include multiple code portions including a first code block to control the DSP and a second code block to control the controller.

    摘要翻译: 一方面,本发明包括具有数字信号处理器(DSP)的装置,耦合到DSP以向DSP提供控制信号的控制器以及耦合到DSP和控制器的一次可编程(OTP)存储器 。 OTP存储器可以包括多个代码部分,包括用于控制DSP的第一代码块和用于控制控制器的第二代码块。