Method, apparatus and article of manufacture for a transform module in a graphics processor
    2.
    发明授权
    Method, apparatus and article of manufacture for a transform module in a graphics processor 有权
    用于图形处理器中的变换模块的方法,装置和制品

    公开(公告)号:US07009607B2

    公开(公告)日:2006-03-07

    申请号:US09775086

    申请日:2001-01-31

    IPC分类号: G06T17/00

    摘要: A method, apparatus and article of manufacture are provided for a transform system for graphics processing as a computer system or on a single integrated circuit. Included is an input buffer adapted for being coupled to a vertex attribute buffer for receiving vertex data therefrom. A multiplication logic unit has a first input coupled to an output of the input buffer. Also provided is an arithmetic logic unit having a first input coupled to an output of the multiplication logic unit. Coupled to an output of the arithmetic logic unit is an input of a register unit. An inverse logic unit is provided including an input coupled to the output of the arithmetic logic unit or the register unit for performing an inverse or an inverse square root operation. Further included is a conversion module coupled between an output of the inverse logic unit and a second input of the multiplication logic unit. In use, the conversion module serves to convert scalar vertex data to vector vertex data. Memory is coupled to the multiplication logic unit and the arithmetic logic unit. The memory has stored therein a plurality of constants and variables for being used in conjunction with the input buffer, the multiplication logic unit, the arithmetic logic unit, the register unit, the inverse logic unit, and the conversion module for processing the vertex data. Finally, an output converter is coupled to the output of the arithmetic logic unit for being coupled to a lighting module to output the processed vertex data thereto.

    摘要翻译: 提供了一种用于图形处理的变换系统作为计算机系统或单个集成电路的方法,装置和制品。 包括适于耦合到顶点属性缓冲器以从其接收顶点数据的输入缓冲器。 乘法逻辑单元具有耦合到输入缓冲器的输出的第一输入。 还提供了具有耦合到乘法逻辑单元的输出的第一输入的算术逻辑单元。 耦合到算术逻辑单元的输出是寄存器单元的输入。 提供了一个逆逻辑单元,其包括耦合到算术逻辑单元或寄存器单元的输出的输入,用于执行反或平方根操作。 还包括耦合在反逻辑单元的输出和乘法逻辑单元的第二输入之间的转换模块。 在使用中,转换模块用于将标量顶点数据转换为向量顶点数据。 存储器耦合到乘法逻辑单元和算术逻辑单元。 存储器中存储有多个常数和变量,用于与输入缓冲器,乘法逻辑单元,算术逻辑单元,寄存器单元,逆逻辑单元和用于处理顶点数据的转换模块结合使用。 最后,输出转换器耦合到算术逻辑单元的输出,用于耦合到照明模块,以将经处理的顶点数据输出到照明模块。