Abstract:
The invention relates to an N-bit asynchronous Quantizer including a 2N−1 signal amplifier stages (G12-G2N−12) arranged in series, the input of the first stage being capable of receiving a signal to be quantized; 2N−1 comparators (C12-C2N−12), one comparator being connected to the output of each amplifier stage (G12-G2N−12), and capable of comparing the value of this output with a predetermined threshold value; and at least 2N−2 delay lines (D12-D2N−12) placed at the output of the 2N−2 first comparators, the signals supplied at the output of the delay lines (D12-D2N−12) and of the last comparator constituting at any instant the quantized binary values of the input signal with a time shift.