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公开(公告)号：US20110179394A1
公开(公告)日：2011-07-21
申请号：US13077434
申请日：2011-03-31
IPC分类号： G06F17/50
CPC分类号： H01L21/26513 , H01L21/0271 , H01L21/26546 , H01L21/266 , H01L21/31144 , H01L21/32139 , H01L21/823412 , H01L27/0207 , H01L27/088
摘要： A semiconductor process and apparatus to provide a way to reduce plasma-induced damage by applying a patterned layer of photoresist (114) which includes resist openings formed (117) over the active circuit areas (13, 14) as well as additional resist openings (119) formed over inactive areas (15) in order to maintain the threshold coverage level to control the amount of resist coverage over a semiconductor structure so that the total amount of resist coverage is at or below a threshold coverage level. Where additional resist openings (119) are required in order to maintain the threshold coverage level, these openings may be used to create additional charge dissipation structures (e.g., 152) for use in manufacturing the final structure.
摘要翻译： 一种半导体工艺和装置，用于通过施加包括在有源电路区域（13,14）上形成的抗蚀剂开口（117）的光致抗蚀剂（114）的图案化层以及附加的抗蚀剂开口（114）来提供减少等离子体引起的损伤的方法 119），以便保持阈值覆盖水平以控制半导体结构上的抗蚀剂覆盖的量，使得抗蚀剂覆盖的总量处于或低于阈值覆盖水平。 为了保持阈值覆盖水平，需要额外的抗蚀剂开口（119），这些开口可用于产生用于制造最终结构的附加电荷耗散结构（例如，152）。
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公开(公告)号：US08343842B2
公开(公告)日：2013-01-01
申请号：US13077434
申请日：2011-03-31
IPC分类号： H01L21/331 , H01L21/8222
CPC分类号： H01L21/26513 , H01L21/0271 , H01L21/26546 , H01L21/266 , H01L21/31144 , H01L21/32139 , H01L21/823412 , H01L27/0207 , H01L27/088
摘要： A semiconductor process and apparatus to provide a way to reduce plasma-induced damage by applying a patterned layer of photoresist which includes resist openings formed over the active circuit areas as well as additional resist openings formed over inactive areas in order to maintain the threshold coverage level to control the amount of resist coverage over a semiconductor structure so that the total amount of resist coverage is at or below a threshold coverage level. Where additional resist openings are required in order to maintain the threshold coverage level, these openings may be used to create additional charge dissipation structures for use in manufacturing the final structure.
摘要翻译： 一种半导体工艺和装置，用于通过施加图案化的光致抗蚀剂层来提供减少等离子体引起的损伤的方法，所述图案化层包括形成在有源电路区域上的抗蚀剂开口以及形成在非活性区域上的附加抗蚀剂开口，以便保持阈值覆盖水平 以控制半导体结构上的抗蚀剂覆盖的量，使得抗蚀剂覆盖的总量处于或低于阈值覆盖水平。 为了维持阈值覆盖水平，需要额外的抗蚀剂开口，这些开口可用于产生用于制造最终结构的附加电荷耗散结构。
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公开(公告)号：US07951695B2
公开(公告)日：2011-05-31
申请号：US12125856
申请日：2008-05-22
CPC分类号： H01L21/26513 , H01L21/0271 , H01L21/26546 , H01L21/266 , H01L21/31144 , H01L21/32139 , H01L21/823412 , H01L27/0207 , H01L27/088
摘要： A semiconductor process and apparatus to provide a way to reduce plasma-induced damage by applying a patterned layer of photoresist (114) which includes resist openings formed (117) over the active circuit areas (13, 14) as well as additional resist openings (119) formed over inactive areas (15) in order to maintain the threshold coverage level to control the amount of resist coverage over a semiconductor structure so that the total amount of resist coverage is at or below a threshold coverage level. Where additional resist openings (119) are required in order to maintain the threshold coverage level, these openings may be used to create additional charge dissipation structures (e.g., 152) for use in manufacturing the final structure.
摘要翻译： 一种半导体工艺和装置，用于通过施加包括在有源电路区域（13,14）上形成的抗蚀剂开口（117）的光致抗蚀剂（114）的图案化层以及附加的抗蚀剂开口（114）来提供减少等离子体引起的损伤的方法 119），以便保持阈值覆盖水平以控制半导体结构上的抗蚀剂覆盖的量，使得抗蚀剂覆盖的总量处于或低于阈值覆盖水平。 为了保持阈值覆盖水平，需要额外的抗蚀剂开口（119），这些开口可用于产生用于制造最终结构的附加电荷耗散结构（例如，152）。
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公开(公告)号：US20090291547A1
公开(公告)日：2009-11-26
申请号：US12125856
申请日：2008-05-22
IPC分类号： H01L21/3065 , H01L21/265 , G06F17/50
CPC分类号： H01L21/26513 , H01L21/0271 , H01L21/26546 , H01L21/266 , H01L21/31144 , H01L21/32139 , H01L21/823412 , H01L27/0207 , H01L27/088
摘要： A semiconductor process and apparatus to provide a way to reduce plasma-induced damage by applying a patterned layer of photoresist (114) which includes resist openings formed (117) over the active circuit areas (13, 14) as well as additional resist openings (119) formed over inactive areas (15) in order to maintain the threshold coverage level to control the amount of resist coverage over a semiconductor structure so that the total amount of resist coverage is at or below a threshold coverage level. Where additional resist openings (119) are required in order to maintain the threshold coverage level, these openings may be used to create additional charge dissipation structures (e.g., 152) for use in manufacturing the final structure.
摘要翻译： 一种半导体工艺和装置，用于通过施加包括在有源电路区域（13,14）上形成的抗蚀剂开口（117）的光致抗蚀剂（114）的图案化层以及附加的抗蚀剂开口（114）来提供减少等离子体引起的损伤的方法 119），以便保持阈值覆盖水平以控制半导体结构上的抗蚀剂覆盖的量，使得抗蚀剂覆盖的总量处于或低于阈值覆盖水平。 为了保持阈值覆盖水平，需要额外的抗蚀剂开口（119），这些开口可用于产生用于制造最终结构的附加电荷耗散结构（例如，152）。
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