专利检索 ap:("Debendra Mallik" OR "Robert L. Sankman" OR "Sanka Ganesan" OR "George Vakanas" OR "Omkar Karhade" OR "Sri Chaitra Jyotsna Chavali" OR "Zhaozhi George Li" OR "Holly A. Sawyer") AND inv:"Sri Chaitra Jyotsna Chavali" 第 1 页

1.

发明申请
STACKED WIRE-BOND DICE ATTACHED BY PILLARS OR BUMPS ABOVE A FLIP-CHIP DIE ON A SEMICONDUCTOR PACKAGE SUBSTRATE 审中-公开

公开(公告)号：US20200098727A1

公开(公告)日：2020-03-26

申请号：US16141415

申请日：2018-09-25

申请人： Debendra Mallik , Robert L. Sankman , Sanka Ganesan , George Vakanas , Omkar Karhade , Sri Chaitra Jyotsna Chavali , Zhaozhi George Li , Holly A. Sawyer

发明人： Debendra Mallik , Robert L. Sankman , Sanka Ganesan , George Vakanas , Omkar Karhade , Sri Chaitra Jyotsna Chavali , Zhaozhi George Li , Holly A. Sawyer

IPC分类号： H01L25/065 , H01L25/00 , H01L23/00 , H01L23/538

摘要： A wire-bond memory die is coupled to a system-on-chip processor where the processor is flip-chip mounted on a semiconductor package substrate, and the wire-bond memory die is also flip-chip configured through a redistribution layer that pins out to a series of pillars that contact the semiconductor package substrate. The wire-bond memory die is stacked on the processor and the redistribution layer overhangs the processor to contact the series of pillars.