ORing FET control circuit and method

    公开(公告)号:US12301104B2

    公开(公告)日:2025-05-13

    申请号:US18371371

    申请日:2023-09-21

    Abstract: An ORing FET control circuit and method are provided. The circuit includes an ORing FET, a comparator, first, second and third resistors, a first capacitor, a diode and a driving unit. The positive and negative input terminals of the comparator are electrically connected to the input and output voltages. The first resistor, the second resistor, the first capacitor, and the third resistor are electrically connected in series between a reference voltage and a ground terminal sequentially. The reference voltage is lower than a voltage at the positive input terminal. When the input voltage is lower than the output voltage, if a voltage across the ORing FET is larger than a threshold, the comparator outputs a driving signal at low level, and correspondingly the driving unit turns off the ORing FET. The threshold depends on resistances of the first and second resistors.

    ORING FET CONTROL CIRCUIT AND METHOD
    2.
    发明公开

    公开(公告)号:US20240113703A1

    公开(公告)日:2024-04-04

    申请号:US18371371

    申请日:2023-09-21

    CPC classification number: H03K17/063 H03K17/04106 H03K17/302

    Abstract: An ORing FET control circuit and method are provided. The circuit includes an ORing FET, a comparator, first, second and third resistors, a first capacitor, a diode and a driving unit. The positive and negative input terminals of the comparator are electrically connected to the input and output voltages. The first resistor, the second resistor, the first capacitor, and the third resistor are electrically connected in series between a reference voltage and a ground terminal sequentially. The reference voltage is lower than a voltage at the positive input terminal. When the input voltage is lower than the output voltage, if a voltage across the ORing FET is larger than a threshold, the comparator outputs a driving signal at low level, and correspondingly the driving unit turns off the ORing FET. The threshold depends on resistances of the first and second resistors.

    TOTEM-POLE PFC CIRCUIT AND CONTROL METHOD THEREOF

    公开(公告)号:US20240113617A1

    公开(公告)日:2024-04-04

    申请号:US18372010

    申请日:2023-09-22

    CPC classification number: H02M1/4233 H02M1/0085 H02M1/081

    Abstract: A totem-pole PFC circuit and a control method thereof are provided. The circuit includes an AC power source, first and second bridge arms and a controller. The first bridge arm includes first and second switches electrically connected in series with a connection node electrically connected to a first terminal of the AC power source. The second bridge arm includes third and fourth switches electrically connected in series with a connection node electrically connected to a second terminal of the AC power source. When a potential at the first terminal is higher than a potential at the second terminal, the controller turns off the fourth switch if the L-phase voltage is lower than a first threshold voltage. When the potential at the first terminal is lower than the potential at the second terminal, the controller turns off the third switch if the L-phase voltage is higher than a second threshold voltage.

Patent Agency Ranking