Dynamic block processing in a host signal processing modem
    1.
    发明授权
    Dynamic block processing in a host signal processing modem 失效
    主机信号处理调制解调器中的动态块处理

    公开(公告)号:US06405268B1

    公开(公告)日:2002-06-11

    申请号:US09385919

    申请日:1999-08-30

    IPC分类号: G06F1314

    CPC分类号: G06F13/24

    摘要: A host signal processing (HSP) modem or transceiver includes a transmit buffer and a receive buffer. The transmit buffer stores multiple blocks of information representing a transmit signal, and the receive buffer includes available space for multiple blocks of information representing a receive signal. Each block of information corresponds to its respective signal for an associated period that spans the time between consecutive interrupts for the HSP modem. When the host computer fails to service one or more interrupts, the hardware portion of the HSP modem uses the reserve of information from the transmit buffer to generate the transmit signal and stores one or more blocks of information representing the receive signal in the receive buffer. Accordingly, the HSP mode maintains the connection and data throughput even when the host computer misses interrupts. When the host computer services an interrupt, the modem software determines the number of interrupts missed and then dynamically selects the amount of data to process in an attempt to fill the transmit buffer and empty the receive buffer. The amount of information that the modem software processes in response to a single interrupt can be limited so that the transmit buffer is filled and the receive buffer is emptied over a series of serviced interrupts.

    摘要翻译: 主机信号处理(HSP)调制解调器或收发器包括发送缓冲器和接收缓冲器。 发送缓冲器存储表示发送信号的多个信息块,并且接收缓冲器包括用于表示接收信号的多个信息块的可用空间。 每个信息块对应于跨越HSP调制解调器的连续中断之间的时间的相关周期的相应信号。 当主计算机无法服务于一个或多个中断时,HSP调制解调器的硬件部分使用来自发送缓冲器的信息保留来产生发送信号,并将表示接收信号的一个或多个表示接收信号的块存储在接收缓冲器中。 因此,HSP模式即使在主计算机中断时也保持连接和数据吞吐量。 当主计算机服务中断时,调制解调器软件确定丢失的中断数,然后动态选择要处理的数据量,以尝试填充发送缓冲区并清空接收缓冲区。 可以限制调制解调器软件响应于单个中断处理的信息量,使得发送缓冲器被填充,并且接收缓冲器在一系列服务中断上被清空。