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14 条记录 (耗时 0.056 秒)

    Development of Assertions for Integrated Circuit Design Simulation
    9.
    发明申请
    Development of Assertions for Integrated Circuit Design Simulation 有权
    开发集成电路设计仿真的断言

    公开(公告)号：US20080222205A1

    公开(公告)日：2008-09-11

    申请号：US12066109

    申请日：2006-09-11

    申请人： Tim Lange

    发明人： Tim Lange

    IPC分类号： G06F17/30 ,  G06F17/50 ,  G06F3/048

    CPC分类号： G06F17/5022

    摘要： One embodiment of the present application includes the preparation of an assertion for inclusion in an integrated circuit simulation performed with a processing device (21). In response to an input to this processing device (21), a set of integrated circuit waveforms are defined to test the assertion. The processing device (21) tests the assertion with these waveforms; and after successful testing, the integrated circuit simulation is performed with the assertion.

    摘要翻译： 本申请的一个实施例包括准备包含在用处理设备（21）执行的集成电路仿真中的断言。 响应于对该处理装置（21）的输入，定义了一组集成电路波形以测试断言。 处理装置（21）用这些波形测试断言; 在成功测试之后，通过断言进行集成电路仿真。

    Video data filtering arrangement and method
    10.
    发明授权
    Video data filtering arrangement and method 失效
    视频数据过滤布置和方法

    公开(公告)号：US07084929B2

    公开(公告)日：2006-08-01

    申请号：US10207311

    申请日：2002-07-29

    申请人： Tim Lange ,  Jud Lehman

    发明人： Tim Lange ,  Jud Lehman

    IPC分类号： H04N9/64

    CPC分类号： H04N19/86 ,  H04N19/176 ,  H04N19/60

    摘要： Signal processing is enhanced using a filtering arrangement that re-uses data in a register array for filtering consecutive pixel blocks. According to an example embodiment of the present invention, consecutive blocks of pixel data corresponding to an image and sharing an edge therebetween is filtered. The consecutive blocks of pixel data are read and loaded into first and second halves of a register array, and pixel data in registers on opposite sides of the edge is filtered and returned to the register array. After filtering, data in the first half of the register array is unloaded and written back to the memory. Data in the second half of the register array is then shifted to the first half of the register array and additional pixel data is read and loaded into the second half of the register array. The additional pixel data corresponds to the image, is consecutive to and shares an edge with the pixel data shifted to the first half of the register array. In a more particular example embodiment of the present invention, pixel data in the first half of the register array and corresponding to a vertical edge between left and right halves of the pixel data is also filtered, prior to being unloaded and written back into memory. With these approaches, edge data from an image that may, for example, exhibit blockiness or other characteristics can be filtered using a register array while re-using a portion of data loaded into the register array.

    摘要翻译： 使用重新使用寄存器阵列中的数据来过滤连续像素块的滤波装置来增强信号处理。 根据本发明的示例性实施例，滤波对应于图像并且共享其边缘的连续的像素数据块。 像素数据的连续块被读取并加载到寄存器阵列的第一和第二半部，并且边缘相对侧的寄存器中的像素数据被滤波并返回到寄存器阵列。 过滤后，寄存器阵列的前半部分的数据被卸载并写入存储器。 然后将寄存器阵列的后半部分中的数据移动到寄存器阵列的前半部分，并读取附加像素数据并将其装入寄存器阵列的后半部分。 附加像素数据对应于图像，连续并共享具有偏移到寄存器阵列的前半部分的像素数据的边。 在本发明的更具体的示例性实施例中，在卸载并写入存储器之前，对寄存器阵列的前半部分中的像素数据的左半部和右半部分之间的垂直边缘的像素数据进行滤波。 利用这些方法，可以使用寄存器阵列来过滤来自图像的边缘数据，例如表现出块状或其它特征，同时重新使用加载到寄存器阵列中的数据的一部分。